Tensilica AI co-processor for automotive
Cadence Design Systems has developed a configurable co-processor to provide automotive neural processing units with more flexibility.
The Tensilica NeuroEdge 130 AI Co-Processor (AICP) is a new class of processor designed to complement any neural processing unit (NPU) for agentic and physical AI networks on advanced automotive, consumer, industrial and mobile SoCs.
The core is based on the proven architecture of the Tensilica Vision DSP family and provides more than 30% area savings and over 20% savings in dynamic power and energy without impacting performance. It also runs the same software, AI compilers, libraries.
The Tensilica Xtensa VLIW-based SIMD architecture allows for custom extensions, and this can provide compatibility with in-house NPUs to improve the end-to-end performance and efficiency compared to its application-specific predecessors.
This issues instructions and commands to the NPU as a control processor with optimised instructions to run non-NPU optimal tasks such as ReLU, sigmoid and tanh. It issues 512 wide instructions with 512 8×8 multiply accumulate (MAC) units and also includes a new high bandwidth direct interface (HBDI) to feed the NPU.
Cadence says multiple customer engagements are currently underway, including indie Semiconductor and Neuchips. Dream Chip also uses the Tensilica core for automotive designs.
“With the rapid proliferation of AI processing in physical AI applications such as autonomous vehicles, robotics, drones, industrial automation and healthcare, NPUs are assuming a more critical role,” said Karl Freund, founder and principal analyst of Cambrian AI Research. “Today, NPUs handle the bulk of the computationally intensive AI/ML workloads, but a large number of non-MAC layers include pre- and post-processing tasks that are better offloaded to specialized processors. However, current CPU, GPU and DSP solutions involve tradeoffs, and the industry needs a low-power, high-performance solution that is optimized for co-processing and allows future proofing for rapidly evolving AI processing needs.”
“Cadence has proven AI co-processor use cases with our Tensilica DSPs. With AI workloads transforming and becoming less domain-specific, our AI SoC and systems customers have been seeking a small and efficient AI-focused co-processor for better PPA and future-proofing,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “Continuing our track record of IP innovations, we’ve introduced a purpose-built new class of processor. Designed as an NPU companion, the Tensilica NeuroEdge 130 AICP raises the bar for performance efficiency to address our customers’ most demanding AI applications.”
“AI and computer vision are playing an important role in a growing range of embedded applications,” said Jeff Bier, founder of the Edge AI and Vision Alliance. “But AI models and associated pre- and post-processing steps are evolving rapidly; for example, today many developers are adopting transformer-based multimodal models and LLM-based AI agents. We applaud Cadence’s ongoing innovation in flexible and efficient processors, which are key to making edge AI and vision widely deployable.”
The NeuroEdge 130 AICP is supported by the Cadence NeuroWeave™ Software Development Kit (SDK), a single SDK used across all of Cadence’s AI IP. This uses the Tensor Virtual Machine (TVM) stack to tune, optimize and deploy their AI models for Cadence’s AI IP. It also comes equipped with a lightweight standalone AI library, allowing direct programming of AI layers on the new processor and bypass potential overheads of some compiler frameworks.
“As a leader in SoC solutions targeting the automotive market, indie focuses on SoC architecture innovation to deliver high performance with area and power efficiency. To achieve this, we integrate processing elements into our SoCs optimally suited to particular computational functions, ensuring that our solutions can meet the demands of ADAS systems for computer vision, radar and sensor fusion. indie has successfully deployed Tensilica DSPs in multiple production ADAS SoCs. We welcome the addition to Cadence’s IP portfolio of the NeuroEdge AICP and supporting tools, software libraries and ecosystem to address evolving AI-enabled automotive applications,” said Hervé Brelay, Vice President of SW Engineering at indie.
“MulticoreWare’s longstanding partnership with Cadence has positioned us to support OEMs and Tier 1 partners deploying AI workloads in automotive and other edge environments. Through these collaborations, we’ve observed firsthand how NPUs often fall short as a complete, standalone AI deployment solution. NeuroEdge AICP hardware and SDK elegantly address this gap. AI SoC modules built around the NeuroEdge AICP not only deliver peak performance for today’s leading models but also offer the flexibility to accommodate future AI innovations,” said John Stratton, CTO at MulticoreWare.
“Neuchips is revolutionizing data centers and server farms with cutting-edge SoCs designed to handle the immense processing demands of large language models and transformers. As the SoC AI subsystems are frequently challenged with supporting pre- and post-processing stages, it is great to see that the NeuroEdge AICP is designed to manage such tasks. Cadence’s mature Tensilica toolchain and software infrastructure help make it easy to integrate this new IP into complex SoC designs,” said Ken Lau, CEO of Neuchips.
The Tensilica NeuroEdge 130 AICP is generally available now and is ISO 26262-ready for the automotive market.
Details are on the Cadence Tensilica NeuroEdge 130 AICP landing page.
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