# The op amp and its compensation

Op amp compensation, despite its omnipresence, can occasionally be challenging especially when one has to choose an optimal compensation technique given the requirements and constraints beyond designer’s control. Perhaps one of the reasons for the challenge is that the literature in general focuses much more on the differences rather than the similarities between the different compensation techniques.

It is very insightful to focus not only on the conceptual dissimilarities but also on the similarities thereby attaining greater understanding of the close relationships across apparently disparate techniques and concepts. In pursuit of such an objective this article first focuses on few certain aspects of op amp to eventually help narrow down on perhaps the least understood compensation technique generally used in electronics. This article also briefly discusses strict definitions of compensation networks and sheds light on its possible violations in literature.

**Feed forward Gain: With respect to which node?**

Before going into op amp compensation it is important to shed some light on two most basic configurations in the op amp; the non-inverting (Fig. 1.A) and the inverting (Fig 1.B). There is plenty of literature describing the closed-loop gain of these two such configurations and highlighting the differences in the closed-loop transfer functions [1, 2, 3].

The difference in the feedforward gain of the two configurations is highlighted in [1] and is also shown here for convenience in equations 1.a and 1.b corresponding to non-inverting and inverting configurations respectively. One may wonder why the feedforward gain of the inverting configuration (AINV) is different from the non-inverting configuration (ANINV) given the fact that the same op amp is used for both the configurations.

Let us first focus on how similar the two configurations really are and then show why the net mathematical expressions for the feedforward gain differ.

The inverting configuration shown in Fig 1.B may be turned into an equivalent non-inverting configuration as shown in Fig 1.C. This transformation is simply the result of determining the input required of a non-inverting configuration that would yield the same output as the inverting configuration.

Fig. 2.A and Fig. 2.B correspond to the block diagram representations of the Fig. 1.A and Fig. 1.C respectively. Notice the similarities between Figures 2.A and 2.B. Both of the figures show that the two configurations are exactly the same when observed from the subtraction block towards the output. The subtraction block models the op amp subtraction of its two inputs.

In the inverting configuration block diagram (Fig. 2.B) the input signal (-XINV) is transformed by the factor ZF/(ZF + ZG) before it reaches the subtraction block input, referred to by XINV,i. Across the two block diagrams of Fig. 2.A & Fig. 2.B, the feedforward gain and the feedback factors are exactly the same when observed strictly with respect to (w.r.t.) the subtraction block input or the op-amp input, the difference between the two configurations is merely that of a mathematical transformation of the input signal when observed w.r.t the input signal. As a result the open-loop gain stability analysis is also the same for the two configurations.

Using linear system operation, the inverting configuration block diagram in Fig. 2.B may be mapped to that in Fig. 2.C. The block diagram in Fig. 2.C is a net outcome of the simple mathematical manipulation done on the inverting configuration, however the sub-blocks in Fig. 2.B better correspond to the elements of the actual physical system. Models that have better one-to-one correspondence to their physical system generally prove to be less confusing. Fig. 2.C is a block diagram representation of the inverting configuration w.r.t. signal source (*-XINV*) and as a result the feedforward gain expression (*AINV*), shown in equation 1.b, appears different from that of equation 1.a for the non-inverting configuration.

**Noise Gain: Not just for noise**

For convenience the output noise (including offset) is often referred to the input terminals of an op-amp or an amplifier [4]. In general, an output voltage with a given polarity referred entirely to the positive input of the op-amp leads to the same polarity input voltage as the output voltage whereas the entire reference of the same to the negative input leads to input voltage of opposite polarity.

From an uncorrelated noise model standpoint, the sign of noise voltage or its phase is irrelevant and therefore reference of the noise voltage to either the inverting or the non-inverting input of the op-amp becomes mathematically equivalent. With the feedback network on the inverting input, referring the output noise entirely to the op-amp’s non-inverting input immediately gives a valid and recognizable configuration of non-inverting amplifier (Fig 1.A). Thus the overall gain for noise referred to either of the inputs of the op-amp is always equal to the closed loop gain of a non-inverting configuration.

Thus even if one has an inverting configuration w.r.t the signal source, the op-amp input referred noise effectively only sees the non-inverting configuration gain of (1+*ZF*/*ZG*) and this is commonly referred to as the Noise-Gain. However if the signal source is on the positive input of the op-amp, as in non-inverting configuration, then the gain for the signal and the input referred noise is exactly equal to the Noise-Gain.

**Compensation Techniques: The Intent **

There are many op-amp compensation techniques described in [1] such as “dominant pole compensation”, “gain compensation”, “lead compensation”, “compensated attenuator”, and “lead-lag compensation.” An ideal outcome of any compensation techniques is to make a multi-pole system (high order system) approach a single pole overall system from purely stability perspective because single pole feedback systems are unconditionally stable.

At minimum most of these compensations achieve an effective two-pole system status with the second pole (first non-dominant pole) as far as possible from the first-pole (dominant pole) and often with the higher frequency break points being considerably further out that their impact on stability is negligible. In some cases enhancement of the bandwidth is achieved by intentionally reducing the separation between the dominant and the non-dominant poles resulting in some high frequency peaking observable via the gain-frequency response.

In many literatures on electronics, least well explained of all of the compensation techniques is perhaps the lead-lag compensation technique. Unfortunately certain popular references [1, 3] also seem to have errors in their open-loop gain plots and associated description for lead-lag compensation which will be focused upon in this article.

**Compensation Network Classification: Violations?**

Strict definition or at least a clear definition of lead network is that its zero lies at lower frequency magnitude than its pole thereby contributing net two break points [6]. In a lag network, the pole lies at lower frequency magnitude than its zero [6]. The lead-lag network is a combination of the two networks with all of the lead network’s two break points lying at lower frequency magnitude than those of the lag network. Likewise in lag-lead network the two break points of the lag network are at lower frequency magnitude than those of the lead network. Whether it is the lag-lead or the lead-lag network, each contributes four break points: two poles and two zeros.

With a given overall system and technology constraints one may use any suitable compensation network to compensate a system with its inherent and sometimes un-modifiable break points. The chosen compensation technique may intentionally involve cancellations of inherent pole(s) of the system with the introduced zero(s) or vice-versa thereby resulting in a net lower-order system.

No matter what the overall compensated system finally looks like as far as the compensation network is concerned its original classification shouldn’t change. However in the electronics world the classification of compensation network often seems to be violated. As an example the lead-lag compensation shown in the lead-lag section of [1,3] is strictly a lag network because the compensation network purely introduces a pole and a zero with pole residing at lower frequency than the zero as observed in the open-loop gain expression (*Aβ*). Note that analysis using Rate-Of-Closure (ROC) requires plotting (1/*β*) which makes the feedback network’s poles appear as zeros and vice-versa without impacting their frequency location.

This article adopts the Bode plots of the open-loop gain expression for stability analysis and hence the resulting poles and zeros definitions. Likewise the example of op-amp design utilizing lead-compensation in [4,5] is also strictly a lag compensation since in the resulting compensation network (series resistor and capacitor across the input and output of an amplifying transistor) the pole lies at lower frequency than its zero. The strict definitions referred to here are as per the Control System Engineering reference [6] wherein the stand-alone compensation network implementations are used in cascade with the uncompensated systems, however in electronic circuit compensations the compensation networks are, relatively speaking, embedded into the uncompensated systems.

So perhaps there exists a good reason, although unknown to me at the time of writing this article, for the noted compensation network classification violations or inconsistencies in-between the well-respected Electronics Engineering references [1,3,4,5] and the Control System Engineering reference [6]. However, since rest of the explanation in this article specifically pertains to Electronics Engineering references [1,3], the compensation network classification names will not be altered to avoid confusion to the reader when cross-referencing in-between this article and the corresponding references.

**Lead-Lag Compensation: The Implementation
**

Lead-lag compensated circuit is shown in Fig 3.A as per the references [1,3]. For practical and simplicity purposes assume that the uncompensated op-amp has two inherent poles: the dominant pole (

**ƒ**p,dom) & the first non-dominant pole (

**ƒ**p,nondom). Fig. 3.B shows the open-loop gain magnitude plot, wherein the solid line plot represents the case of uncompensated op-amp and thus shows the inherent break points of the op-amp itself.

By introducing the lead-lag compensation a pole (**ƒ**’p,dom) and a zero (**ƒ**z) are introduced such that the introduced pole (**ƒ**’p,dom) becomes the new dominant pole and the introduced zero (**ƒ**z) roughly cancels the inherent dominant pole (**ƒ**p,dom) of the op-amp although Fig. 3.B shows a perfect cancellation between **ƒ**z and **ƒ**p,dom. This should clear up the fog from the corresponding (erroneous) plots shown in [1,3]. Thus one apparent advantage of lead-lag compensation, like many other compensation techniques, is that the spacing between the resulting dominant and non-dominant poles has increased thereby enhancing stability. However one may ask that why not just perform lead-compensation wherein the introduced zero due to the compensation network cancels the op-amp inherent first non-dominant pole.

The well-known reason is that the lead compensation clearly produces bandwidth limitation whereas lead-lag does not [1,3]. Why does the lead-lag compensation not limit the bandwidth? The answer to this question is not clear, if at all visible, from the open-loop gain plot. One may arrive at the answer by analyzing the closed-loop amplification process. For the lead-lag compensation case the equations for the derivation of closed-loop gain are well documented in [1] but here is an intuitive explanation, although utilizing a bit of simple mathematics, for why this technique does not limit the bandwidth.

In the two amplifier configurations shown in Fig. 1 the negative input of the op amp is the point of negative feedback and therefore this is a very low incremental impedance node, also known as a virtual ground, as long as the open-loop gain magnitude is large enough at the frequency of concern. Therefore it makes sense to convert the signal source voltage to the equivalent input signal current which can then be multiplied by the feedback resistance (RF) to give net output voltage (YINV) as shown in Fig. 4.

One popular means to perform such a transformation is via a Thevenin equivalent network [2]. Fig. 4 shows the Thevenin equivalent circuit of Fig. 3.A. In Fig. 3.A assume that the op-amp and its feedback network is not there, in other words the load is removed, and then consider the contribution from the input source (XINV) at the previously connected negative input of the op amp. This contribution may be called the Thevenin equivalent voltage (VTH) which decreases in magnitude as the frequency increases because the compensation capacitor offers lower impedance as the frequency increases.

At the same time the Thevenin equivalent series impedance (ZTH) will be impacted in the same manner due to the compensation capacitor. Therefore the net signal current (ISIG) going towards the negative input (virtual ground) of the op-amp will equal (VTH/ZTH=XINV/RG) wherein all of the break points in the numerator term of VTH will be cancelled by all of the break points in the denominator term of ZTH, thereby leading to a signal current that is not impacted by the compensation network. As a result there is no bandwidth constraint due to the lead-lag compensation network. See Eq. 2.a and 2.b

The downside of such a lead-lag implementation is that the Noise-Gain peaks with frequency but the signal path gain does not peak, provided sufficient compensation, thereby degrading Signal-to-Noise-Ratio (SNR).

**Lead Compensation: Various Implementations
**

The lead-lag compensation described so far (Fig. 3.A) was attained by a series resistor and capacitor elements connected from the negative input of the op-amp to the ground or equivalently across the inputs of the op-amp. However when such a series structure is connected across input-output pins of amplifying transistor, the compensation technique is called lead-compensation in conjunction with resulting pole-splitting compensation [4,5]. Such series resistor and capacitor compensation structures are almost always present inside the op-amps.

Often the process begins with placing a capacitor across a gain element which leads to pole-splitting compensation due to capacitive Miller effect. Then to compensate for the resulting right half plane zero a series resistor is added and adjusted to often achieve lead-compensation wherein the zero is moved till it cancels out the first non-dominant pole [4, 5]. Thus how one connects such a series resistor and capacitor network is subject to requirements and available options with the culmination of either lead or lead-lag compensation.

To implement lead-compensation in amplifiers utilizing op amp ICs, a feedback capacitor is placed in parallel with the feedback resistor [1,3]. Regardless of the lead-compensation implementation approach its intent is often to cancel a pole, usually the first non-dominant pole of the system being compensated, by introducing a zero via the compensation network.

**Closing Remarks**

Going by the strict definition of compensation networks as described in [6] the so called lead-lag compensation [1,3], also shown in Fig 3.A, is strictly a lag compensation. Likewise the so called lead compensation network [4,5] placed across the amplifying nodes of the transistor and is also strictly a lag compensation network. This is yet another reminder of how similar these compensation techniques really are and yet classified differently in various references for one reason or another. Perhaps all of the mentioned compensation techniques, except the “gain compensation” techniques, may be classified under “break point compensation” technique as the DC open-loop gain magnitude remains fixed during the compensation process and only the break points are made to undergo a combination of their relocation, creation, and elimination.

**References**

1 B. Carter and R. Mancini, “Op Amps for Everyone,” 3rd edition, 2009, Elsevier Inc.

2 A. Sedra and K. Smith, “Microelectronics Circuits,” 2nd edition, 1987, HRW.

3 “Feedback, Op Amps and Compensation,” Application Note AN9415.3, Nov. 1996, Intersil.

4 B. Razavi, “Design of Analog CMOS Integrated Circuits,” 2006, McGraw-Hill.

5 D. Johns and K. Martin, “Analog Integrated Circuit Design,” 1997, JW, Inc.

6 K. Ogata, “Modern Control Engineering,” 2nd edition, 1995, PHI