The fifth open source chip manufacturing project has opened for submissions.
Tiny Tapeout 5 allows chip developers to design and produce their own chips for a few dollars on the Skywater 130nm process using the efabless multi-project wafer (MPW) programme.
The project offers a tile of 60×100 um, enough for about 1000 digital logic gates, depending on their size. A new 3×2 tile size has been added to accommodate larger projects and developers can also buy extra tiles if they need more room. Runs up to 50MHz with 8 input lines, 8 outputs and 8 bidirectional I/Os as well as clock and nreset (low to reset)
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Submissions close on the 4th of November. Designers can pre-purchase space to guarantee a slot. The chips are expected back by the end of March 2024, shipping to designers before June 2024.
The chips from the previous TT2 and TT3 projects are expected back in October with board shipping to designers in December.
The TT4 project expects chips back in February 2024 with boards shipping in March. This had 143 submissions from 30 countries with 80k standard cells, 2.5m of wire and 7 HDLs used.
Tiny Tapeout is working with Aisler for the PCB and PCBA service and fulfilment partner.