Tool boosts on-chip passive component synthesis

Tool boosts on-chip passive component synthesis

New Products |
By Nick Flaherty

Cadence Design Systems has launched a passive device synthesis and optimization technology that speeds up design rule check (DRC)-clean parametric cells (PCells) and accurate electromagnetic (EM) models of passive devices, such as inductors, transformers, T-coils and more.

EMX Designer is integrated with the Cadence Virtuoso ADE Product Suite and gives a 10x boost for synthesis times, with significant productivity gains. This lets customers rapidly synthesize DRC-clean passive devices at a touch of a button, based on electrical and geometrical requirements.

EMX Designer PCells can easily be modified to meet the designers’ exact layout requirements, using a long list of options from a user-friendly interface inside the Virtuoso platform. When used with the EMX 3D Planar Solver electromagnetic modeling engine the EMX Designer solution ensures the accuracy of generated models. The integration with the Virtuoso platform offers users various options for plotting and appending results.

“pSemi evaluated the Cadence EMX Designer solution as we were interested in automating the passive device creation and optimization process for our proprietary PDKs,” said John Sung, Vice President of Engineering Infrastructure at pSemi. “EMX Designer fully met our requirements for PCell flexibility, speed and accuracy. It is seamlessly integrated into the Cadence design flow and will improve the productivity of our design teams.”

“The new EMX Designer solution adds key technology to our leading Custom IC design flow, delivering the most flexible passive-device PCells in record-breaking time while also enabling significant productivity gains,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “We are pleased to offer our customers an expanded, complete, highly differentiated and efficient IC design platform that addresses the early stages of the design all the way through to signoff and closure.”

“Using Cadence’s new EMX Designer solution, our team was able to improve productivity and reduce design cycle times,” said Peter Gammel, CEO, Ubilite. “We managed to synthesize passive devices with better performance, and at the same time, save 20% silicon area for the advanced process nodes we use with the new solution. EMX Designer offers us a versatile library of passive devices, delivering extremely accurate results across all process nodes at incredibly fast speeds.”

EMX Designer also supports the Cadence Intelligent System Design strategy, enabling system-on-chip (SoC) design excellence and system innovation.

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