Toshiba improves SOI process for RF

Toshiba improves SOI process for RF

Technology News |
By Peter Clarke

The process is known as TaRFSOI is SOI-CMOS and the latest generation of the process – TaRF11 – has an improved noise figure (NF). TaRF11-based MOSFETs, intended for use in LNAs, achieved a minimum noise figure of 0.48dB at 8 GHz, an improvement of 0.3dB compared to similar devices developed with TaRF10. In common with TaRF10, the TaRF11 process allows the LNA, RF switch and control circuit to be fabricated on a single chip.

Toshiba is continuing to develop the process to support the move of carrier frequencies from 5GHz up to 7GHz planned for smartphones.  In addition, Toshiba plans to develop devices for 7 GHz to 10 GHz ultra-wide band (UWB) using the TaRFSOI process.

Related links and articles:

News articles:

Tower, Soitec, Maxscend ramp RFSOI

GloFo 45nm RFSOI process ready for 5G

Globalfoundries’ Morgenstern: Diversity is key in Dresden

If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :    eeNews on Google News


Linked Articles