Toshiba, Japan Semi develop analog process with embedded memory

Toshiba, Japan Semi develop analog process with embedded memory

Technology News |
By Peter Clarke

Toshiba Electronic Devices and Storage Corp. (Kawasaki, Japan) and Japan Semiconductor Corp. have developed an analog manufacturing platform for automotive applications.

The 0.13-micron process includes the G1 flash memory module from Floadia Corp., which can be provided by three additional masks. G1 is based on a SONOS architecture and capable to scale down to 40nm geometry and supports auto grade temperature and quality.

Toshiba and Japan Semiconductor offer three LDMOS structures and a wide device lineup, including eNVM that meets AEC-Q100/Grade-0, an international standard in automotive reliability.

Japan Semi was formed by the merger of the Oita Operations of Toshiba Corp. and Iwate Toshiba Electronics Co. Ltd. in April 2016.

There is a trade-off between on-resistance (RonA), a key parameter for LDMOS (Lateral Double Diffused Metal Oxide Semiconductor, and the breakdown voltage between drain and source (BVDSS). The lower the RonA, the better the performance with a constant BVDSS. Toshiba and Japan Semiconductor confirmed that two kinds of LDMOS, with stepped-oxide or LOCOS (local oxidation of silicon) located between the drain and source, have a maximum RonA that is 44 percent better than STI-based LDMOS (shallow-trench isolation). They also determined mechanisms to evaluate the advantages of LOCOS-based LDMOS’s device reliability, failure rates and ESD tolerance.

Toshiba and Japan Semiconductor plan to start sampling automotive semiconductors with the newly developed platform in December 2022. Details of the achievement were reported at the IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD) 2022, an international conference held in Vancouver, Canada and online on May 22 to 25, 2022.

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