Toshiba shows first SCSI-like Universal Flash demo system
Shown at the All-Members meeting of the MIPI Alliance in Berlin, the demonstration is a complete testing environment for next-generation memory solutions built around the latest Jedec 1.1 UFS specification. It brings together a UFS memory device, UFS host controller IP and UFS software drivers in a prototyping and testing system that will speed up UFS designs, enable interoperability and ensure smooth integration with host processors.
UFS is designed to be the most advanced specification for embedded flash memory-based storage in mobile devices such as smart phones and tablet computers through an evolutionary progression of JEDEC standards in this field. It has been specifically tailored for mobile applications and computing systems requiring high performance and low power consumption. The initial data throughput for UFS will be 300 megabytes per second (MB/s), and the standard also supports command queuing features to raise random read/write speeds.
The standard adopts the well-known SCSI Architecture Model and command protocols supporting multiple commands with command queuing features and enabling a multi-thread programming paradigm. This differs from conventional flash-based memory cards and embedded flash solutions which process one command at a time, limiting random read/write access performance. In addition, a forthcoming complementary UFS Host Controller Interface (HCI) specification will allow system designers greater flexibility by simplifying the involvement of the host processor in the operation of the flash storage subsystem. The UFS HCI specification and the adoption of SCSI will provide a well-known software programming model and enable wider market adoption.
The interface uses the upcoming MIPI UniPro version 1.41 and MIPI M-PHY version 2.0 Specifications and Toshiba has set up a full eco-system of device and host controllers – as well as IP for key building blocks.
UniPro is a comprehensive specification meant to act as a universal chip-to-chip protocol, providing a common tunnel for other protocols. The M-PHY interface is designed as the primary physical interface (PHY layer) for the UniPro specification, and is a high speed serial interface targeting up to 2.9 gigabits per second (Gbps) per lane with up-scalability to 5.8Gbps per lane.
Work on UFS is coordinated by JEDEC’s JC-64 Committee for Embedded Memory Storage and Removable Memory Cards, and is supported by principal consumer electronic and cell phone OEMs.
More information about MIPI specifications related to UFS can be found at: https://www.mipi.org/about-mipi/industry-associations/jedec-solid-state-technology-association.