TowerJazz qualifies Polyteda’s cloud-ready physical verification workflow

Business news |
By eeNews Europe

The company now has foundry-validated design rule check runsets for PowerDRC/LVS. The Design Rule Check (DRC) and Layout Versus Schematic (LVS) tool provides IC designers an access to a fast, accurate, and cloud-ready signoff solution that accelerates time to market and improves manufacturability of chips targeted for TowerJazz 180nm process technology.

“Integrated circuits designers currently need fast, accurate and affordable physical verification tools such as PowerDRC/LVS,” said Alexander Grudanov, Polyteda Cloud Chief Executive Officer. “Our team is committed to contributing to the EDA industry with qualitative advanced technologies certified by such semiconductor leaders as TowerJazz foundry.”

Polyteda Cloud plans to further support the technologies of TowerJazz, while developing a productive strategic partnership with the global specialty foundry leader.


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