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Trench SiC MOSFET cuts on-resistance in half

Trench SiC MOSFET cuts on-resistance in half

Technology News |
By Nick Flaherty



SiC MOSFETs are built from numerous transistor cells arrayed side by side. To reduce overall device resistivity, the resistance of each cell must be reduced and cells must be arrayed more densely.

For this reason, the trench type is being used increasingly in place of the conventional planar type because it allows cells to be arrayed densely in substrate trenches rather than mounting gate electrodes on the substrate.  The trench type, however, has had problems with its gate-insulating film breaking at high voltage. To correct this problem, Mitsubishi developed an electric-field-limiting structure based on advanced simulations that were conducted during the structural-design stage. Reducing the electric field applied to the gate-insulating film to that of a conventional planar-type level enables the gate-insulating film to achieve greater reliability under high voltage. This reduces the on-resistance by half, reducing heat generation and allowing the use of a smaller cooling device for energy savings and miniaturization.

The electric-field-limiting structure ensures device reliability SiC MOSFETs control current flowing through the semiconductor layer between the drain and source electrodes by applying a voltage to the gate electrode. To achieve control with a small voltage, a thin gate-insulating film is required. If high voltage is applied in a trench-type power semiconductor device, a strong electric field can concentrate in the gate and can easily break the insulating film.  To correct this, Mitsubishi developed the electric-field-limiting structure that protects the gate insulating film by implanting aluminium and nitrogen to change the electrical properties of the semiconductor layer, taking advantage of the trench structure.

First, aluminum is implanted vertically and an electric-field-limiting layer is formed on the bottom surface of the trench. The electric field applied to the gate-insulating film is reduced to the level of a conventional planar power semiconductor device, thereby improving reliability while maintaining the breakdown voltage of over 1500V. Next, the side grounding connecting the electric-field-limiting layer and the source electrode is formed by using a newly developed technique to implant aluminum in an oblique direction to enable high-speed switching and reduced switching loss. 
 
Locally formed high-impurity doped layers achieve the low on-resistance as the trench SiC MOSFET has transistor cells that are smaller than those of planar types, allowing more cells to be arrayed on a single chip. If transistor intervals between the gate electrodes are too narrow, however, current flow becomes difficult and device resistivity increases. Mitsubishi developed a new method for implanting nitrogen in an oblique direction to locally form a layer of SiC with a high concentration of nitrogen, which allows electricity to be conducted easily in the current path. As a result, even when cells are arrayed densely, resistivity can be reduced by approximately 25% compared to the case of no high-concentration layer. The new manufacturing method also allows intervals of the side grounding to be optimized. The result is a specific on-resistance of 1.84 mΩ/cm2 at room temperature, about half that of planar types, while maintaining the 1500V breakdown voltage.

Mounting the transistor in power semiconductor modules for power electronic equipment will lead to energy savings and smaller equipment in 2021. 

www.mitsubishielectric.com

 


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