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TSMC looks to 2nm in 2024

TSMC looks to 2nm in 2024

Business news |
By Nick Flaherty



With 3nm volume production starting later this year, TSMC is turning its attention to the 2nm generation.

Both are being driven by demand for chips for high performance computing, says CC Wei, CEO of TSMC in its latest quarterly results,

Advanced technologies below 7nm account for half the company’s revenue of US$17.6bn in Q1, better than expected, with 5nm providing 20% of wafer revenues and 7nm 30%. All six product areas increased in the first quarter. Smartphone increased 1% quarter-over-quarter to account for 40% of the first quarter revenue. HPC increased 26% to account for 41%. IoT increased 5% to account for 8%. Automotive increased 26% to account for 5% and digital consumer increased 8% to account for 3%.

“We expect our HPC platform to be TSMC’s strongest growing platform in 2022 and the largest contributor to our growth, fueled by the structural megatrend driving increasing need for greater computation power and energy-efficient computing,” said Wei.

The 2022 capital budget stays steady at between US$40 million and $44 billion, although it expects capacity to remain tight throughout 2022.

Tool challenge

The chip-making tools are a major factor for future process nodes, and these use chips made by TSMC that can be in short supply.

 “Like many other industries, our suppliers are facing great challenges in their supply chain from the continued impact of COVID-19, which are creating labour component and chip constraint in their supply chains and extending towards delivery lead time for both advanced and mature nodes,” said Wei. “TSMC is working closely with our suppliers and taking several actions to do our part to address the supply chain challenges.”

“We have sent several teams on-site to support our suppliers and are working closely with them to identify critical chips that are gauging the tool delivery. We are working with our customers to prioritize our wafer capacity to support those critical chips to help mitigate the chip constraint issue. By taking such actions, we do not expect any impact to our 2022 capacity plan, and we continue to work closely with our suppliers on 2023 and beyond so that we can ramp-up our capacity to meet customers’ demand,” he said.

“Our N3 schedule is unchanged, and we’re on track for volume production in second half of 2022 with good year. We expect the ramp of N3 to be driven by both HPC and smartphone applications. We continue to see a high level of customer engagement at N3 and expect more new tape-outs for N3 for the first year as compared with N5 and N7,” he added.

An enhanced process, N3E, is becoming popular, he says, with volume production is scheduled for a year after N3, although this could be earlier.

“Our N3E result is quite good and the progress is ahead of our schedule,” said Wei. “So far, I still did not have a very solid data to share with you that how many months we can pull in but yes, it’s in our plan. Since we have a very strong demand on the N3 and N3E, we are still planning to have enough capacity to support our customers.”

The 2nm process, N2, will enter volume production in 2025 using a gate-all-around (GAA) design rather than the FinFET used at 3nm. However Wei will not comment on whether this will use the current extreme UV (EUV) lithography or the high numerical aperture (NA) technology currently under development at ASML. 

“Our N2 development is on track, including new transistor structure and progressing to our expectation and we still plan the production in 2025,” he said. “At the end of 2024 we will enter the risk production. 2025, it will be in production, probably close to the second half or the end of 2025. That’s our schedule.”

www.tsmc.com

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