TSMC shuns high-NA EUV lithography
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Foundry TSMC does not need to use high-NA extreme ultraviolet lithography tools for the manufacture of chips on its A14 (1.4nm) process according to reports from the TSMC North America Technology Symposium.
The company introduced the A14 process at the symposium saying it is expected to enter production in 2028. It has previously been stated that an A16 process due to appear late 2026 and that too does not require a high-NA EUVL tool.
“From 2nm to A14, we don’t have to use high-NA, but we can continue to maintain similar complexity in terms of processing steps,” Kevin Zhang, senior vice president of business development, is reported saying at the launch.
This provides a contrast to Intel which is has been aggressive in its adoption of high-NA as it follows through on a program to catch up with semiconductor foundry market leaders TSMC and Samsung. Intel was the first company to receive a high-NA EUVL tool and plans to start making chips with high-NA EUVL with its 18A manufacturing process in 2025.
It’s all about the price tag
A key reason for TSMC’s delay in adoption could be the extreme price tag placed on the tools by monopoly supplier ASML Holding NV. The price of the high-NA EUV exposure machine is said to be about US$380 million or more than twice the approximately US$180 million of the previous generation lower-NA EUV machines.
TSMC has apparently calculated that it is more cost-efficient to use multiple patterning using low-NA EUVL and experience slightly longer dwell times in line. In addition, it will benefit from superior well-established yields using the current generation of equipment.
It also remains to be seen whether Intel will stick to its aggressive embrace of the technology as it now has a new CEO – Lip-Bu Tan – whose plans for Intel Foundry have not yet been fully disclosed.
Intel versus TSMC
It has also been reported that Intel and TSMC have reached a preliminary agreement to form a joint venture to run Intel’s chip manufacturing plants.
Tan told analysts that he recently met with CC Wei, TSMC’s CEO, and Morris Chang, the founder and former chairman of TSMC. “Morris and CC are very long-time friends of mine. We also met recently (to) try to find areas we can collaborate and so that we can create a win-win situation,” Tan said on an analyst conference call.
The first instance of TSMC’s A14 manufacturing process does not make use of back-side power distribution. A variant called A14P with backside power distribution due in 2029 and a subsequent high-performance version – A14X – could be candidates for high-NA EUVL.
Even if Intel and Samsung press on with the adoption of high-NA EUVL to catch up TSMC in leading-edge processes they well face development costs. By pioneering in this development they could be paving the way for TSMC to step in and use high-NA EUVL when it considers adoption is cost-effective.
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