UK startup is raising funds for Open Power processor
Red Semiconductor Ltd. is a UK startup designing a family of “auditable” microprocessors based on the Open Power processor instruction set architecture.
The processor is intended to run the Linux operating system amongst others and will be able to run x86 code in native mode thanks to emulation capabilities, according to David Calderwood, chairman of the company.
IBM announced it was opening up its Power processor architecture to licensing in 2013.
“Our plan is to develop a security auditable system-on-a-chip for mass volume applications in power-efficient hybrid 3D GPU and VPU workloads, as well as accelerated cryptographic, embedded network and communication applications,” the company states on its website.
Calderwood told eeNews Analog that IBM is supporting Red Semiconductor’s efforts to develop a high-performance, power-efficient processor capable of ALU, GPU and video processing. Red Semiconductor is working on test chips using open-source EDA tools from Sorbonne University’s LIP6 Lab. He added that the company is conducting a funding round that it expects to close in 3Q22.
At present the company, which was registered in October 2021, is operating on €750,000 of grant support from the European Union, Calderwood said. The European funding is through two of their funding initiatives; NLnet and the NGI Pointer.
Avoiding the rush to RISC-V
Calderwood said the company opted for the Power ISA because it offers high performance from a good architecture and is open, allowing for transparency. The latter is becoming increasingly important for security auditing, he said.
“Everyone is rushing to RISC-V, but there are some inherent limitations in that ISA. Augmentation of the instruction set is almost necessary and that leads to fragmentation,” said Calderwood.
Calderwood added that there is a renewed awareness in processor design of principles that were important in the days of minicomputers, although for different reasons. In those days, said Calderwood, the processor core minimized memory calls because memory was costly. As memory became more plentiful, memory calls and data movement did so too. A return to memory efficient architectures is coming, suggested Calderwood, but for reasons of performance. “You see it in Graphcore and Nvidia, but these chips are for AI and specialized functions. This minimal memory use needs to done for an OS [operating system] processor.”
Calderwood said: “Because we come from an open-source environment we will have no problem showing what is inside the chip. That makes for chips that can be vetted for security.”
Prototypes
The company already has a prototype of its processor in FPGA and has taped out a chip design with the IMEC research institute. This is on a 180nm manufacturing process.
The company is looking to create a 40nm prototype design to demonstrate an IoT OS microcontroller, said Calderwood. This would be before going closer to the leading-edge of manufacturing.
The x86 emulation capability may be the result of technology that came to IBM when it acquired Transitive Corp. in 2008. The original developer of the technology, Transitive Technologies Ltd., was founded in Manchester, England in 2000 and did impressive work on software emulation.
Related links and articles:
News articles:
Startup launches near-binary neural network accelerator
IBM, Samsung propose vertical FET for better scaling
IBM announces first 2nm chip and manufacturing process
GloFo sues IBM over $2.5 billion damages claim
IBM shows Telum, first dedicated AI inference chip
