Ultra-low-energy optical chip-to-chip interconnect demonstrated

Ultra-low-energy optical chip-to-chip interconnect demonstrated

Market news |
By Rich Pell

Interconnects have become the key bottleneck in modern compute and networking systems, says the company, which is developing its LightBundle multi-Tbps LED-based optical link for chip-to-chip communication. Highly variable workloads are driving the evolution of densely interconnected, heterogeneous, software-defined clusters of XPUs, hardware accelerators, and high-performance shared memory.

Exploding Artificial Intelligence (AI)/Machine Learning (ML) and High-Performance Computing (HPC) workloads are accelerating the need for interconnects with ultra-low power consumption, ultra-high bandwidth density, and low latency.

“We have already demonstrated LightBundle links at less than 2pJ/bit using our LightBundle technology,” says Bardia Pezeshki, founder and CEO of Avicena, “and will soon demonstrate sub-1pJ/bit links.”

LightBundle is based on arrays of GaN micro-emitters that leverage the microLED display ecosystem and can be integrated onto high performance CMOS ICs. The company is working with Lumileds, one of the world’s top GaN LED innovators, to rapidly ramp production of highly optimized microLED arrays.

Today’s high-performance ICs use SerDes-based electrical links to achieve adequate IO density. However, the power consumption and bandwidth density of these electrical links degrade quickly with length. Conventional optical communications technologies developed for networking applications have been impractical for inter-processor and processor-memory interconnects due to their low bandwidth density, high power consumption, high cost, and inability to be co-packaged with hot ASICs, says the company.

“All of this is now changing,” says Pezeshki. “We have developed ultra-low power, high-density optical transceivers based on microLEDs. These innovative devices leverage recent display industry advances and would have been impractical just a few years ago. Our optimized links support up to 10Gbps per lane over -40°C to +125°C temperature with excellent reliability. A LightBundle interconnect uses hundreds of parallel optical lanes connecting microLED arrays to CMOS-compatible PD arrays over multi-core fiber to create low-cost multi-Tbps interconnects with a 10 meter reach.”

Willem Sillevis-Smitt, Head of Marketing at Lumileds adds, “Avicena’s demonstration of record low power consumption with its LightBundle interconnect technology is proof of the advances Lumileds has made in microLEDs. We are looking forward to enabling vastly lower power in data center interconnects.”

The parallel nature of LightBundle, says the company, is well matched to parallel chiplet interfaces like UCIe, OpenHBI, and BoW, and can also be used to extend the reach of compute interconnects like PCIe/CXL, HBM/DDR/GDDR memory links, as well as various inter-processor interconnects like NVLink with low power and low latency.

Avicena Tech

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