UltraSoC to debug heterogeneous Tensilica processors

UltraSoC to debug heterogeneous Tensilica processors

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By eeNews Europe

UltraSoC was founded in 2005 to develop debug systems that can cope with multiple cores in embedded systems and on advanced SoCs.

Xtensa’s processor architecture allows processors and DSPs to be optimized for the needs of a specific design and is usually deployed as an off-load processor to take over specific tasks from a host processor to improve overall performance and power efficiency. This produces SoCs with heterogeneous architectures which have been difficult to debug with mono-culture debug systems.

UltraDebug is designed to speed pre- and post-silicon debugging in these environments, allowing the designer to include an on-chip debug infrastructure tailored to the system design. It enables holistic debugging of system software running on chips that incorporate multiple, heterogeneous functional units, as well as custom logic designed in-house.

Xtensa processors are the latest CPU family to be supported within UltraDebug, which already includes direct support for ARMv7 and ARMv8, MIPS, and Ceva Teak-lite.

Initial results of the UltraSoC/Cadence collaboration were demonstrated at the 52nd Design Automation Conference held in June 2015. A short video showing the simultaneous debugging of ARM and Xtensa cores can be viewed here. The IP component of the debug system will be available for integration and tapeout in 3Q15.

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