UMC and SuVolta partner to develop 28-nm low-power process technology

UMC and SuVolta partner to develop 28-nm low-power process technology

Technology News |
By eeNews Europe

SuVolta and UMC are working together to take advantage of implementing DDC transistor technology to reduce leakage power and improve SRAM low-voltage performance.

The companies also announced that the process technology will enable a highly flexible adoption method which includes a ‘DDC PowerShrink low-power platform’ option for the ultimate power and performance benefit, where all transistors utilize the DDC technology.  A ‘DDC DesignBoost transistor swap’ option also works with existing design databases where a subset of transistors are replaced with DDC transistors. Typical applications of this option are replacing the leakier transistors with DDC transistors that could cut leakage, or replacing the SRAM bitcell transistors with DDC transistors to improve performance and lower minimum operating voltage (Vmin).

“In the next weeks and months, we expect to see promising results from joint technology development with SuVolta to further validate the power and performance benefits of the DDC technology in UMC’s 28 nm HKMG process,” said T.R. Yew, vice president of Advanced Technology Division at UMC. “By incorporating SuVolta’s advanced technology into our HKMG process, we intend to deliver a 28 nm mobile computing process platform to complement our existing Poly-SiON and HKMG technologies.”

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