Understanding and designing differential filters for communications systems

Understanding and designing differential filters for communications systems

Feature articles |
By Peter Clarke

To do that, we’ll start with a communication system receive chain IF stage filter. We’ll compare a few types of frequently used filter, and look at how to start with single-ended filter design then transfer that to a differential filter design. We’ll also examine a few points on how to optimize differential circuit PCB design.

Differential circuit advantages in RF signal chains

The user can get higher signal amplitude with a differential circuit than with a single-ended circuit. With the same power supply voltage, a differential signal can provide double the amplitude as compared to a single-ended signal. It also provides better linearity and SNR performance.

Differential circuits are fairly immune to outside EMI and crosstalk from nearby signals. This is because the received voltage is doubled, and theoretically, the noise affects the tightly coupled traces equally, cancelling each other out. Differential signals also tend to produce less EMI. This is because the changes in signal levels (dV/dt or dI/dt) create opposing magnetic fields, again cancelling each other out.

Differential signals can reject even-order harmonics. As an example, consider continuous wave (CW) passing through one gain stage. When using one single-ended amplifier, the output can be expressed as shown in Equation 1, and Equation 2.



When using one differential amplifier, the input and output are shown in Equations 3, 4, 5, and 6.


Ideally, the output does not have any even-order harmonics, making a differential circuit a better choice for a communication system.

Filter comparison



Table 1. Filter comparison

The IF-filter in a communications receive chain is basically a low-pass filter or band-pass filter. It is used for rejecting the aliasing signals along with spurs generated by active components. The spurs include harmonics and IMD products, among others. With the filter, the receive chain can provide signals with higher SNR for the ADC to analyze.

The Chebyshev Type I filter was chosen as the topology because it has good in-band flatness, quick roll-off and no equiripple response in the stopband.

Designing a low-pass filter

Because the receiver IF filter is used to reject spurs and aliasing signals, quicker stopband roll-off is better. However, faster roll-off means higher-order components, and there are a few reasons high-order filtering is not recommended:

– Difficulty for tuning at design and debug stage

– Difficulty in mass production: capacitors and inductors have part-to-part variation and it is difficult to ensure that filters on each PCB board to have the same response.

– Large PCB size.

In general, use a seventh-order or lower filter. At the same time, if bigger in-band ripple isn’t a problem with the same order components, then faster roll-off in the stopband is a payout. Then, define the response needed by specifying the required attenuation at a selected frequency point. To determine the maximum amount of ripple in the passband, keep the specification to the maximum limit of the system requirement. This can help get faster roll-off in the stopband.

Use low-cost filter software, such as MathCad, MATLAB, or ADS to design the single-ended low-pass filter. Alternatively, design the filter manually. A useful guide is “RF Circuit Design” by Chris Bowick (Reference 1).


To determine the orders of the filter, normalize the frequency of interest by dividing it with the cutoff frequency of the filter.



For example, if the in-band ripple needs to be 0.1 dB, the 3 dB cutoff frequency is 100 MHz. At 250 MHz the rejection needs to be 28 dB, so the frequency ratio is 2.5. A third-order low-pass filter can meet this requirement. If the source impedance of the filter is 200 Ω, the load impedance of the filter is also 200 Ω, RS/RL is 1; use a capacitor as the first component. Then, the user receives a normalized C1 = 1.433, L2 = 1.594, C3 = 1.433. If the fc is 100 MHz, use Equation 7 and Equation 8 to get finalized results.




CSCALEDf is the final capacitor value.

LSCALED is the final inductor value.

Cn is a low-pass prototype element value.

Ln is a low-pass prototype element value.

RL is the final load resistor value.

fc is the final cutoff frequency.


C1SCALED = 1.433/(2p × 100 × 106 × 200) = 11.4 pF

L2SCALED = (1.594 × 200)/(2p × 100 × 106) = 507.4 nH

C3SCALED = 11.4 pF


The circuit is shown in Figure 1.



Figure 1. Single-ended filter example

Convert the single-ended filter into a differential filter (Figure 2).



Figure 2. Converting single-ended filter into differential filter

Using the real-world value for each component, the filter is updated as shown in Figure 3.



Figure 3. Final differential filter

Note that if the output impedance of the mixer or IF amplifier, and the input impedance of ADC, are capacitive, it is better to consider using a capacitor as the first component and a capacitor as the last component. Also, it is important to tune the first capacitor and last-stage capacitor value at a higher rate (at least 0.5 pF) than the capacitance of the output impedance of the mixer or IF amplifier and input impedance of the ADC. Otherwise, it is very difficult to tune the filter response.

Designing a band-pass filter

In communication systems, when the IF frequency is quite high, some low-frequency spurs need to be filtered out, such as the half IF spur. To do this, design a band-pass filter. For a band-pass filter, it is not necessary to be symmetrical for low-frequency and high-frequency rejection. The easy way to design a band-pass antialiasing filter is to design a low-pass filter first, then add one shunt inductor in parallel with the shunt capacitor at the final stage of the filter to limit low frequency components (a shunt inductor is a high-pass resonance pole).

If a one-stage high-pass inductor is not enough, add one more shunt inductor parallel with the first stage shunt capacitor to get more rejection for low-frequency spurs. After adding the shunt inductor, tune all components again, to achieve the desired out-of-band rejection specification, and then finalize the filter component values.

Note that in general, for a band-pass filter, serial capacitors are not recommended because they increase tuning and debugging difficulty. The capacitance value is usually quite small, and it is heavily affected by parasitic capacitance.

Differential filter layout consideration

The differential traces in a pair need to be of equal length. This rule originated from the fact that a differential receiver detects where the negative and positive signals cross each other at the same time—the crossover point. Therefore, the signals arrive at the receiver at the same time for proper operation.

The traces within a differential pair need to be routed close to each other. The coupling between the neighbouring lines within a pair is small if the distance between them is >2× the dielectric thickness. The trace separation within a differential pair needs to be constant over its entire length. If the differential traces are routed close together, they will impact the overall impedance. If this separation is not maintained from the driver to the receiver, there are impedance mismatches along the way, resulting in reflections.

Avoid tight (90°) bends when routing differential pairs. Use symmetrical routing when routing differential pairs. If test points are required, avoid introducing trace stubs and also place the test points in a symmetrical manner.

To ease filter component value tuning workloads on the PCB, it is important to keep the parasitic capacitance and inductance as low as possible. The parasitic inductance may not seem to be significant as compared to the design value of the inductor in the filter design, but parasitic capacitance is more critical for a differential IF filter. The capacitors in IF filter designs are typically only a few picofarads. If the parasitic capacitance reaches a few tenths of a picofarad, it affects the filter response significantly. To prevent parasitic capacitance, a good practice is to avoid any ground or power planes under the differential routing region and under power supply chokes.

One example of the differential filter PCB layout is the ADI receiver reference design board (Figure 4). This shows a fifth-order filter between the ADL5201 digitally controlled, variable gain amplifier, and the AD6649, 14-bit, 250 MPS, ADC.


Figure 4. Example of differential circuit PCB layout design

Differential circuits: valuable RF design tool

Differential circuits offer some significant advantage for RF signal chain design. Perhaps the greatest challenge to using them is simply moving past the idea that they’re hard to design, test and optimize. Once you take a good look at how to understand and work with differential filters, you may find yourself with a valuable new tool for RF design.


RF Circuit Design, Christopher Bowick; Published by Newnes/Elsevier, ISBN 978-0-7506-8518-4 (available at Amazon)

About the Author

Mercy Chen is RF Applications Manager at Analog Devices, Inc., in Shanghai, China. She joined ADI in 2003 as a Handset Applications Engineer and became a Senior RF Applications Engineer in 2005. Mercy received her Bachelor and Master Degree in E & E from Hefei University of Technology.

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