The Vitis unified software platform can automatically tailor the Xilinx hardware to the software or algorithmic code without the need for hardware expertise. The Vitis platform is able to plug into common software developer tools and can use a rich set of optimised open-source libraries to allow developers to focus on algorithms. Vitis is additional to Xilinx’ Vivado Design Suite, which remains supported for developers that wish to program using hardware code. Vitis is also able to boost the productivity of those hardware developers by packaging hardware modules.
Vitis is built on a stack-based architecture that plugs into open-source standard development systems and build environments and includes a rich set of standard libraries.
The initial layer of the Vitis target platform includes a board and preprogrammed I/O. The second layer – the Vitis core development kit – uses the open-source Xilinx runtime library to manage data movement between different domains, including the subsystems, the AI Engine in the forthcoming Versal ACAP, as well as an external host. The second layer also features core development tools such as compilers, analyzers and debuggers. These tools are designed to integrate seamlessly with industry-standard build systems and development environments.
The third layer has over 400 optimised and open-source applications across eight Vitis libraries. These include the Vitis Basic Linear Algebra Subprograms (BLAS) library, the Vitis Solver library, the Vitis Security library, the Vitis Vision library, the Vitis Data Compression Library, the Vitis Quantitative Finance library, the Vitis Database library and the Vitis AI library. These libraries allow software developers to call pre-accelerated functions using standard APIs.
The final layer of the platform is Vitis AI, which integrates the domain-specific architecture (DSA). The DSA configures Xilinx hardware to be optimised and programmed through frameworks such as TensorFlow and Caffe. Vitis AI provides the tools to optimise, compress and compile trained AI models running on a Xilinx device in around a minute. It can also deliver specialised APIs for deployment from edge to cloud. The company will soon release the Vitis Video DSA, which will allow video encoding directly from FFmpeg. Partner companies have also developed to integrate ElasticSearch for big data analytics.
“With exponentially increasing compute needs, engineers and scientists are often limited by the fixed nature of silicon,” said Victor Peng, president and chief executive officer, Xilinx. “Xilinx has created a singular environment that enables programmers and engineers from all disciplines to co-develop and optimize both their hardware and software, using the tools and frameworks they already know and understand. This means that they can adapt their hardware architecture to their application without the need for new silicon.”
Xilinx has also launched a developer site to give easy access to examples, tutorials, documentation, and to connect the Vitis developer community.
Vitis will be available for download for free next month and is fully compatible with most Xilinx FPGAs, SoCs and MPSoCs released within the last decade. Versal ACAP support is expected to be available in the second quarter of 2020.