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Universal Debug Engine is optimised for Qorivva multicore versions

Universal Debug Engine is optimised for Qorivva multicore versions

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By eeNews Europe



Several preconfigured UDE variants ensure a quick start to software development for Qorivva versions MPC5746M, MPC5777M, MPC5748G, MPC5746C, MPC77xK and MPC574xP. The tools take into account the different sizes of the Flash memories integrated onto the SoCs. The UDE multicore / multiprogram loader allows users to assign program code and debug data to the respective core, taking into account the heterogeneous architecture of these SoC which contain besides the main core a varying number of additional programmable units, for example a Generic Timer Module (GTM) or a Security Module (HSM). The core-specific aggregation of debugger windows offers users a clearly arranged, consistent overview over their entire multicore system.

The multi-run function assumes the control over the diverse cores and allows starting and stopping these cores almost synchronously by utilising the debug circuitry integrated on the chips. An innovation is the multicore breakpoint feature that enables users setting breakpoints in shared code. These breakpoints are effective for all cores at the same time. Data breakpoints enable identifying of writing and reading access to a variable. Optionally, even an expectation value can be taken into account.

Particular attention was given to support of all possible trace variants. While data transfer takes place via a conventional parallel port with the types MPC5746C, MPC5748G and MPC574xP, a serial high-speed interface that is based on the Aurora protocol is available for the MPC5746M, MPC577xK, MPC5777M and MPC574xP devices. This offers type-dependent four or two lanes each with 1.25 Gbps data transfer rate, which are processed without limitations by the Aurora trace pod of the Universal Access Device (UAD) 3+. Furthermore, for parallel trace, users can make use of a pod with up to 32-bit recording width.

The device-specific optimizations of the UDE are particularly valuable, among others, with the Qorivva derivates MPC5746M and MPC5777M that were specifically designed for motor controls. With these SoCs, Freescale also integrated a few KByte trace memory on the production chip. This trace memory, together with a Signal Processing Unit (SPU) also integrated on the chip, is ideally suited for troubleshooting. The SPU, which can usually only be laboriously programmed at register level, can be very easily configured for various measurement tasks with the Universal Emulation Configurator (UEC), which is optionally available to the UDE from PLS. Besides control of the trace recording, the underlying state machine model also allows the definition of complex breakpoints with sequencer logic.

PLS: https://www.pls-mc.com/

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