
Universal FPGA module with PCI Express
Normal
0
false
false
false
EN-GB
X-NONE
X-NONE
st1\:*{behavior:url(#ieooui) }
/* Style Definitions */
table.MsoNormalTable
{mso-style-name:”Table Normal”;
mso-tstyle-rowband-size:0;
mso-tstyle-colband-size:0;
mso-style-noshow:yes;
mso-style-priority:99;
mso-style-parent:””;
mso-padding-alt:0cm 5.4pt 0cm 5.4pt;
mso-para-margin-top:0cm;
mso-para-margin-right:0cm;
mso-para-margin-bottom:10.0pt;
mso-para-margin-left:0cm;
line-height:115%;
mso-pagination:widow-orphan;
font-size:11.0pt;
font-family:”Calibri”,”sans-serif”;
mso-ascii-font-family:Calibri;
mso-ascii-theme-font:minor-latin;
mso-hansi-font-family:Calibri;
mso-hansi-theme-font:minor-latin;
mso-bidi-font-family:”Times New Roman”;
mso-bidi-theme-font:minor-bidi;
mso-fareast-language:EN-US;}
A reference design of a SoPC system including a 32-bit Microblaze soft-core processor for use with Xilinx Platform Studio is available free of charge. Windows, Linux, MATLAB, LabView, Visual Basic, C#, C/C++ drivers and a suitable PCIe DMA firmware are under development.
At the heart of the Mars MX2 is a Xilinx Spartan-6 LXT FPGA containing 43,661 logic elements, 116 block RAMs and 58 DSP slices. The module boasts 128 MB of DDR2 SDRAM, 16 MB of Flash, a real-time-clock as well as 108 user I/Os and runs off a single 3.3 V power supply.
The virtually pin-compatible Mars MX1 with two Fast Ethernet interfaces remains available. The SO-DIMM form factor (68x30mm) enables space saving hardware designs and a simple integration of the module into the final product. The company claims that with this modular approach, an application-specific carrier board can usually be implemented on four layers and with a minimum number of components, thus reducing engineering and production costs.
More information at www.enclustra.com/marsmx2
Visit Enclustra at www.enclustra.com
