“Virtual chips” added to programmable-device development tool
PSoC Designer 5.4 is a new version of Cypress’ Integrated Design Environment (IDE) for the PSoC 1 Programmable System-on-Chip architecture and includes over 40 new or enhanced User Modules, which are free “Virtual Chips,” represented by an icon, that are used to integrate multiple ICs and system interfaces into a single PSoC device. Version 5.4 also offers multiple new features to make designing with PSoC faster and easier, including an Auto-Complete feature that automatically suggests variables, functions, and keywords as users type. The version also adds to PSoC Designer the facility for users to create their own User Modules, with complete control over the hardware, firmware, and graphical user interface.
Version 5.4 includes three new SmartSense User Modules that simplify usage of Cypress’s CapSense capacitive touch-sensing technology. The SmartSense2X_EMC User Module supports both the CY8C2xx45 and CY8C28xxx PSoC 1 families. SmartSense2X_EMC not only saves time by automatically tuning capacitive sensors and dynamically adjusting the tuning during operation, it also increases end-systems’ immunity to electromagnetic interference, providing the ability to operate in high-noise environments.
Other key new user modules include a programmable current source and a scanning successive approximation analogue-to-digital converter (SAR ADC). Instead of having to manually configure the hardware and firmware, users can simply drag and drop the scanning SAR ADC into their design to have it automatically measure voltages on any number of inputs. Users can download PSoC Designer 5.4 free of charge at www.cypress.com/psocdesigner
User Modules can be dragged and dropped as icons into a design using PSoC Designer’s graphical user interface. They are pre-tested and pre-characterised, and each comes with a datasheet that designers can use to customise them. PSoC Designer 5.4 includes more than 160 of these User Modules. In addition, PSoC Designer 5.4 boosts engineering efficiency through design re-use by enabling engineers to develop their own User Modules containing their own unique hardware and firmware IP. Designers can also create a customised graphical user interface to configure their User Modules. PSoC Designer 5.4 contains 15 new example projects that show users how to build a wide array of PSoC systems. This version also includes a new graphical interface that makes it easier for users to sort and filter these example projects to find those of interest.
PSoC 1 devices employ a highly configurable system-on-chip architecture for embedded control design, offering a flash-based equivalent of a field-programmable ASIC without lead-time or NRE penalties. PSoC devices integrate configurable analogue and digital circuits, controlled by an on-chip microcontroller, providing both enhanced design revision capability and component count savings. They include up to 32 kBytes of Flash memory, 2 kBytes of SRAM, an 8×8 multiplier with 32-bit accumulator, power and sleep monitoring circuits, and hardware I2C communications. PSoC devices also contain analogue functionality, such as delta-sigma analogue-to-digital converters, operational amplifiers, and programmable switched capacitor networks.
The flexible digital and analogue blocks allow designers to future-proof their products by enabling firmware-based changes during design, validation, production, and in the field. All PSoC devices are also dynamically reconfigurable, enabling designers to change internal resources on-the-fly, using fewer components to perform a given task.
Cypress Semiconductor, www.cypress.com
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
