Wafer fabs lose milllions from gas calibration errors

Wafer fabs lose milllions from gas calibration errors

Technology News |
By Nick Flaherty

The error occurs when measuring very small flows of exotic gas mixtures. These small gas flows occur during chemical vapour deposition (CVD) that is used to build complex 3D structures by depositing successive layers of atoms or molecules as well as during plasma etching to produce tiny features on the surface of semiconducting materials by removing small amounts of silicon.

The exact amount of gas injected into the chamber is critically important to these processes and is regulated by a mass flow controller (MFC). 

“Flow inaccuracies cause nonuniformities in critical features in wafers, directly causing yield reduction,” said Mohamed Saleem, Chief Technology Officer at Brooks Instrument, a US MFC maker. “Factoring in the cost of running cleanrooms, the loss on a batch of wafers scrapped due to flow irregularities can run around $500,000 to $1,000,000. Add to that cost the process tool downtime required for troubleshooting, and it becomes prohibitively expensive.”

Modern fabs rely on accurate gas flows controlled by MFCs which as typically calibrated using the “rate of rise” (RoR) method, which makes a series of pressure and temperature measurements over time as gas fills a collection tank through the MFC.

“Concerns about the accuracy of that technique came to our attention recently when a major manufacturer of chip-fabrication equipment found that they were getting inconsistent results for flow rate from their instruments when they were calibrated on different RoR systems,” said John Wright of NIST’s Fluid Metrology Group which conducted the error analysis.

Wright was particularly interested because for many years he had seen that RoR readings didn’t agree with results obtained with NIST’s “gold standard” pressure/volume/temperature/time system. He and colleagues developed a mathematical model of the RoR process and conducted detailed experiments. The study found that conventional RoR flow measurements can have significant errors because of erroneous temperature values. “The gas is heated by flow work as it is compressed in the collection tank, but that is not easily accounted for: it is difficult to measure the temperature of nearly stationary gas,” he said.

Wright and colleagues found that without corrections for these temperature errors, RoR readings can be off by as much as 1 percent, and perhaps considerably more. This uncertainty has a signficant impact on uniformity and quality in the chip manufacturing process. Current low-end flow rates in the semiconductor industry are in the range of one standard cubic centimeter (1 sccm) per minute, but they will soon shrink by a factor of 10 to 0.1 sccm.

Precise flow measurement is a particularly serious concern for manufacturing processes that use etching of deposited layers to form trench-like features. In that case, the MFC is often open for no more than a few seconds.

“A tiny amount of variation in the flow rate has a profound effect on the etch rate and critical dimensions of the structures” said Iqbal Shareef of equipment maker Lam Research. “So, we are extremely concerned about flow rates being accurate and consistent from chamber to chamber and wafer to wafer, and the industry is already headed toward very small flow rates. We are talking about wafer uniformity today on the nanometer and even subnanometer scale.”

“Each 300 mm wafer can cost up to $400, and contains 281 dies for a die size of 250 to 300 mm2,” said Saleem at Brooks. “Each die in today’s high-end integrated circuits consists of about three to four billion transistors. Each wafer goes through 1 or 2 months of processing that includes multiple runs of separate individual processes.”

The study guides designers of RoR collection tanks and demonstrates easy-to-apply correction methods, showing that different temperature errors will occur for the different gases used in CVD processes. It also provides an uncertainty analysis that others can use to know what level of agreement to expect between MFCs calibrated on different RoR systems.



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