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Wavy-channel TFTs drive more current, could increase pixel density

Wavy-channel TFTs drive more current, could increase pixel density

Technology News |
By eeNews Europe



Side view SEM of the planar (top) and wavy
channel (bottom) TFTs with 2µm tall 3µm wide “fins”
at a 6µm fin pitch. For the WTFT, the 3D wavy pattern
means a 70% larger operational width when compared
with coplanar devices.

The 3D wavy structure, with 2µm tall and 3µm wide “fins” repeated at a 6µm pitch give the channel a 70% larger operational width when compared with coplanar devices, allowing the wavy-channel TFTs (WC-TFT) to drive currents 70% higher per unit chip area.

By expanding the transistor’s width vertically, through the implementation of grooved trenches, turn-on voltage or the OFF current values remain the same as traditional TFTs while benefiting from higher drive currents, the paper reports.

Device schematics for both coplanar TFT architecture
(top) and the wavy channel TFT architecture (bottom).

The researchers proved their new concept by fabricating WC-TFTs on a silicon substrate with ZnO/Al2O3/Al layers for the gate stack.

Once peeled off and transferred onto a flexible polydimethylsiloxane (PDMS) substrate, the transistors operated well with no degradation in their electrical performance or cracks in the gate stack even when flexed down to a bending radius of 5mm. “ON” current was only slightly lower, 10% lower than when bent to a radius of 1cm.


The new transistors were also tested to drive a red LED mounted on the flexible substrate. Compared to traditional planar TFTs, the WC TFTs were able to drive the LED at twice the optical output power, 3 versus 1.5mW, under similar gate and drain bias conditions for both devices.

Conversely, the WC TFTs could be scaled down so as to occupy 70% lower area compared with planar TFTs while delivering the same drive current, hence making it possible to achieve a higher pixel fill factor for active-matrix LCD or OLED displays of higher pixel density.

The peeled-off WC TFTs transferred onto a PDMS substrate.

The researchers anticipate that further design optimization of the WC TFT could lead to more than twice the drive current per unit chip of area compared to planar TFTs, if given tighter fin pitches and higher aspect ratio trenches. Although they chose ZnO as a channel material because they could deposit it uniformly via atomic layer deposition (ALD), the researchers note that their wavy architecture is compatible with other channel deposition methods such as DC and radio frequency (RF) magnetron sputtering, making it material agnostic and applicable to channel materials including indium gallium zinc oxide (IGZO) and indium zinc oxide (IGZO).

Kaust – www.kaust.edu.sa

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