16-Bit, 100 kSPS Low Power Successive Approximation ADC System

By Analog Devices
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This application note describes a 16-bit, 100 kSPS successive approximation analog-to-digital converter (ADC) system that has a drive amplifier that is optimized for a low system power dissipation of 7.35 mW for input signals up to 1 kHz and sampling rates of 100 kSPS.This approach is highly useful in portable battery powered or multichannel applications, or where power dissipation is critical. Read More



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