Effect of layout, vias and design on the blocking quality of filter capacitors
Blocking capacitors on supply pins basically have the task of locally short-circuiting the clocked current loop of the digital circuits using a low impedance. This reduces the radiated magnetic field strength and the RF interference currents coupled into the supply voltage level. If the capacitors are optimally selected with regard to their impedance curve and geometrically optimally placed at the VCC pins, then the clocked RF current can be blocked in the best possible way.
This Whitepaper shows the influence of a MLCC design, the number of ground vias and the placement of the filter components to each other. In addition, unexpected problems with an unfortunate dimensioning of capacitor banks can occur.
Download White Paper
Note: The content for this white paper is provided by our sponsor Würth Elektronik eiSos GmbH & Co. KG. Registration information collected by European Business Press will be shared with this sponsor, for advertising purposes. By registering for this white paper, you consent to receive email advertising from Würth Elektronik eiSos GmbH & Co. KG and other companies of the Würth Elektronik Group.
