Totem Pole PFC Layout considerations
The Totem Pole PFC (TPFC) topology, comprising two half−bridge configurations, presents unique challenges in power conversion. Efficient PCB layout is paramount, especially considering the high-frequency switching of magnetics and capacitors, leading to discontinuous voltages and currents with sharp edges (commonly known as high dv/dt and di/dt edges). This document explores the impact of parasitic elements in the layout, particularly relevant in Wide Bandgap (WBG) device applications like GaN and SiC, known for faster switching rates and lower capacitances. Focusing on TPFC’s operation in Critical Conduction Mode (CrM) and Continuous Conduction Mode (CCM), with emphasis on NCP1680 and NCP1681 product families, this whitepaper aims to identify layout challenges and propose effective solutions tailored to optimize performance in TPFC-WBG device setups.
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