
Who’s managing your power management?
Today’s complex systems employ a wide variety of semiconductor technologies. From the deepest sub-nanometer processors to the analog I/O, it’s easy to see the need for power management devices for multiple voltages – 1.0V, 1.2V, 1.5V, 1.8V, 2.2V, 2.5V, 2.8V, 3.0V, 3.3V and more – all in the same box.
Dozens of companies offer thousands of chips to address these needs. Data sheets, PDKs and application notes make implementation easier than ever. If your volume is high enough, chip company application engineers are more than willing to do the design work for you. Sit back, watch YouTube, follow friends on Facebook and wait for the circuit to arrive by email. It’s not quite that simple, but let’s be honest, there are a lot of free resources out there to assist.
A few dozen years ago, engineers fresh out of school were assigned to the power supply team; the most boring and least challenging aspect of the system and the one most forgiving of inexperience. Could it come to that again?
Not likely. But you really should ask yourself, who is really managing your power management. Is it you or your suppliers? Who really understands your power management needs and more importantly, the solution you’ve implemented? Is your 7Amp 1.2V solution overkill for your 2.9Amp requirement? Could a lower cost LDO be used instead of that switcher?
“Gee, thanks Mr. Semiconductor Company Applications Engineer for designing most of my system with all your high margin chips. It sure plays nice in my application.”
Power management is more than developing solutions that run cool and conserve power. It’s also about managing cost. With today’s plethora of fifteen and twenty cent chips, it’s easy to assume your design is financially viable. But is it?
Financial management is inextricably intertwined with power management. Often power management solutions transcend multiple product generations. It’s the most logical place to drive cost out of a system for greater long term savings. Yet, for some reason, it’s also the most overlooked.
The following figure represents the power board for a typical consumer application:

However, integrating these seven chips into what is called an iASIC, or integrated ASIC, would yield a much lower cost single chip solution while retaining all the desired power saving functionality of the original designs. An iASIC (a chip integrating existing functions without the need to create new IP) is easy to accomplish and has a short development time.

Another example can be described using an industrial power supply application. The original design uses five controllers and ten power MOSFETs.



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About the author
Bob Frostholm is director of sales and marketing at analog ASIC company, JVD Inc. (San Jose, CA.) www.jvdinc.com
Bob has held Sales, Marketing and CEO roles at established and startup Analog Semiconductor Companies for more than 40 years. Bob was one of the original marketers behind the ubiquitous 555 timer chip. After 12 years with Signetics-Phillips, Fairchild and National Semiconductor, he co-founded his first startup in 1984, Scottish based Integrated Power, which was sold to Seagate in 1987. He subsequently joined Sprague’s semiconductor operations in Massachusetts and helped spin off its semiconductor group, creating what is now known as Allegro Microsystems.
Bob has also just published a screenplay, Tags, a technology-mystery centered in Silicon valley.
Bob is the author of several technical articles and white papers. Email: bob.frostholm@jvdinc.com
See related links:
. Current-mode controller benefits defined
. Impact of burn-in testing on power supply reliability
. Power management IC market set to decline
. Power control startup gets strategic support
. UMC copper process targets power management ICs
