Wide frequency universal clocks offer ultra-low jitter
Designed for communications, audio/video and industrial applications, the QFN-10 and TSSOP-8 packaged devices are footprint compatible with industry standard synthesizers, providing a superior performance second source option.
The design the XR811xx synthesizers utilizes a highly flexible delta-sigma modulator and a very wide-ranging VCO in a PLL block that has been optimized to be extremely power efficient. With a core current consumption of just 20 mA, these parts dissipate 60% less power than equivalent competitive devices.
The PLL can operate from either an input system clock or a crystal and incorporates both an integer divider and a high-resolution (<1 Hz) fractional divider for increased flexibility to generate any clock frequency. Additionally, up to four different frequency multiplier settings can be stored allowing for different application configurations providing BOM savings compared to multiple synthesizers. The XR811xx family also offers a choice of LVCMOS, LVDS or LVPECL output drivers.
The company’s universal clock devices deliver low, sub-200 fs, output phase noise jitter as integrated over a PLL loop bandwidth of 1.875 MHz to 20 MHz. This spans the requirements of most WAN and LAN systems and supports communications standards including: 10 GHz Ethernet, 2.5 GHz and 10 GHz SONET/SDH/OTN, xDSL and PCIe, as well as many other synchronized clock system applications.
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