Wireless applications: OS consideration for Zynq All Programmable SoCs
The 4G networks are being deployed on a large scale all over the world. And we are now seeing the early research and development into 5G networking, which targets to have more than 1000 times the data capacity than 4G networks. This emerging technology development drives new and evolving requirements for system vendors: better system integration, improved system performance, lower system BOM cost, increased design flexibility and faster time to market.
Traditional ASIC-based devices support hardware solutions that may meet power and cost goals, but may suffer very high NREs (non-recurring engineering costs), lack of flexibility, and very slow time to market. In order to meet these requirements and address these challenges, Xilinx introduced the All Programmable SoC (APSoC) architecture and successfully implemented it in the Zynq®-7000 product family.
Based on the Xilinx APSoC architecture, Zynq-7000 devices enable extensive system level differentiation, integration and flexibility through hardware, software and I/O programmability (figure 1). Since its announcement in 2011, Zynq-7000 devices have been adopted in a wide range of markets such as communications, data centers, automotive, industrial and aerospace and defense. For the communication market, especially for wireless applications, Zynq-7000 devices provides key unique advantages: Its integrated programmable logic (PL) is highly optimized for digital signal processing; and its ARM® Cortex™ A9 based processing subsystem (PS) enables the very effective implementation of control functions of typical wireless equipment such as remote radios and wireless backhaul units.
Figure 1: Zynq-7000 All Programmable SoC architecture. Click image to enlarge.
When architecting a wireless application based on Zynq APSoC devices, it is necessary to select the operating system that meets the needs of the application. In order to do so, there are several key factors associated with different wireless applications that need to be considered:
Carrier grade operations: System reliability (99.999%) is a common requirement for carrier grade systems. It defines the amount of uptime necessary for the unit. Operationally, it means the support for system features, such as cold/warm restart, fault monitoring, detection and handling, and redundancy.
Real time processing: Real time means a predictable response time, not just “very fast”. A remote radio has different real time requirements compared to wireless backhaul processing. Radio equipment is signal processing heavy and the processor supporting signal processing must meet stringent timing budgets.
Diagnostics: To support in-field and post-mortem diagnostics, considerable performance measurements and logs need to be collected and stored. Hence some key indexes that are important for wireless application can be traced and managed such as performance measurements and statistics, CPU utilization and fault monitoring, OS task switching, and event history, etc.
Tools and protocol integration: A comprehensive integration of debug and diagnostic environment, and some specific network protocol stacks provided by some OS venders could facilitate the designer to develop and maintain an efficient system.
Zynq SoC integrates two ARM Cortex A9 cores. Software architects will need to make a selection between supported multi-processor architectures: SMP (Symmetric Multi-Processing) or AMP (Asymmetric Multi-Processing). As shown in Figure 2, SMP is a system architecture where two or more identical processors have shared resources with a single OS instance running. This architecture theoretically treats all processors equally under the same OS instance. On the contrary, AMP architecture treats processors separately – with or without the OS instance and unaware of each other. The core without an OS running may be executing a piece of micro code is regarded as “bare metal” instance.
Figure 2: SMP versus AMP. Click image to enlarge.
In general, SMP provides a unified OS platform to higher-level applications. A software architect does not need to consider resource sharing between two cores and inter-process communications when building an application on top of the OS. Furthermore, there is performance overhead for SMP which could impact the performance of time-critical wireless applications. Comparing SMP with AMP, AMP’s light weight software with an OS instance has little to no overhead but it needs careful custom software design of shared processor resources and inter-processor communications.
Several key wireless applications can be implemented very efficiently in one of the Zynq APSoC devices; including radio and wireless backhaul. Each wireless application has different performance requirements and needs the OS to support different features. The radio application is a good case in point where Zynq can be used to implement a fully-integrated, hardware and software solution encompassing all the digital front-end processing.
The radio digital front-end application is the major part of a typical Remote Radio Head (RRH) in the 4G wireless network. The processing requirements here can be split into the signal processing and the control processing. In the signal processing domain, Zynq can be used to implement high sample rate filters for digital up-and-down conversion, Crest Factor Reduction (CFR) and Digital Pre-Distortion (DPD). In the case of DPD, it needs to utilize both Zynq PS and Zynq PL.
DPD processing can be broken down into the high-speed data path and the update path. The update path is used to update the filter bank coefficients periodically and is well-suited to being implemented in an ARM Cortex A9 core. Typically the coefficient update must be completed within several to 10’s of milliseconds. Because the arithmetic complexity of the calculations, the A9 core and embed NEON SIMD vector computing unit may be used to meet the required high performance. In addition, the Zynq PL can also support hardware acceleration of processor clock cycle intensive functions and hence the Zynq PL, ARM A9 core, and the NEON co-processor may all be used collaboratively.
The control processing side of radio is typically used for initial radio calibration, configuration, alarms, scheduling, and message termination from the networks. This in a radio application is typically not high performance and as such is easily able to be managed with a single ARM A9 core in Zynq-7000 SoC.
Selecting the appropriate architecture for supporting both the DPD application and control processing application is highly important as it will define the overall performance, reliability, and ease of maintenance.
A common architecture selected for wireless radio application is AMP mode. This devotes a full ARM core to DPD processing when it is running in bare metal mode and provides more computing head room to meet time requirement of DPD coefficient updates. All other applications such as control and OAM run on the second OS controlled ARM A9 core. In this architecture, since the OS only has control of one of two ARM cores, an inter-processor channel has to be established between the applications in the two separate cores, such as using the OCM (On Chip Memory) or shared memory. This is especially important for some key control applications, for example, the application for monitoring the DPD module health. Such Inter-Process Communication (IPC) solutions are none standard and have to be developed separately in the AMP mode.
The SMP architecture is very straightforward with a single OS instance controlling both ARM cores and thus all applications. IPC, debugging and the supporting tool chain are all under the same OS. In order to ensure resources are devoted to DPD application, specific techniques such as core affinity and interrupt shielding can be applied in the software application. In the former case, the DPD application will be running on one core only, potentially no other tasks sharing resources (other than OS scheduler overhead). In the latter case, interrupt services (other than those triggered by the DPD application) are directed to the second core. Thus resources are fully utilized by the DPD application.
Based on the facts stated above, the Zynq APSoC is the ideal platform to support either AMP or SMP architecture. As shown in Figure 3, Zynq integrates two ARM core processors, 12.5 Gb/s SerDes and 500 MHz+ DSP with higher reliability, and provides whole digital front-end functionality such as DPD, CFR, DUC/DDC and CPRI/JESD interfaces. This solution removes the need for interfaces between the processors and separate FPGA, simplifies the PCB design.
Figure 3: Migration from discrete system to Zynq. Click image to enlarge.
The migration from discrete multi-chip solutions to a single-chip integrated solution on the Zynq platform is fairly straightforward. Xilinx provides a smooth migration path to Zynq devices with comprehensive hardware and software solutions. This includes a DSP (digital signal processing) IP library for the DUC, DDC, CFR and DPD. Additionally, multiple OS solutions are supported including device drivers, boot loaders, BSP template and common tools. With a successful migration onto the Zynq platform, this solution can significantly increase the system performance, save total power consumption and lower the BOM cost.
Throughout the document, we discuss key considerations of operating system selection for wireless applications, the implementation architecture and considerations for those (AMP versus SMP), and the direct application of those on a Xilinx Zynq-7000 All Programmable SoC device. In conclusion, these advanced devices from Xilinx enable infrastructure equipment designers with improved performance, increased system integration, lower total BOM cost and lower total power, high reliability and improved time to market while also enabling full programmability of both software and hardware. Designers can now not only develop equipment faster, but also continue to provide updates to the field long after the equipment has been deployed, removing the risk involved with devices such as ASSPs and ASICs.
If you enjoyed this article, you will like the following ones: don't miss them by subscribing to :
