X-Fab adds BCD-on-SOI analysis
X-Fab Silicon Foundries has expanded its SubstrateXtractor tool to add analysis of its 180nm BCD-on-SOI process technology for mixed signal and power devices.
The tool was developed with PN Solutions and allows unwanted substrate coupling effects can be examined and makes X-fab, based in Belgium, the first foundry worldwide to offer this capability. The tool allows faster product development of bipolar-CMOS-DMOS (BCD) devices on the XT108 low power silicon on insulator (SOI) process, avoiding the need for multiple iterations.
This complements the XH018 and XP018 180 nm bulk CMOS processes that the tool was originally designed for, using PN’s widely used PNAware product. This allows chip designers to address the coupling issues caused by interactions between active and passive elements within semiconductor substrates, whether as part of the circuit itself or a parasitic effect.
- 180nm BCD-on-SOI expand to 125V devices
- X-Fab teams for first substrate analysis tool for HV designs
- X-Fab remains on allocation after boom year
- X-Fab teams for 3D stack technology
Support for SOI processes is built on the PNAwareRC tool and makes use of the BOX/DTI features of XT018 process. These enable isolation of constituent functional blocks on the chip from each other. This can apply to sensitive analog blocks needing to be decoupled from digital blocks, or low noise amplifiers that must be isolated from high-voltage driver circuits. It also makes multi-channel implementations much easier, as circuits in XT018 are effectively placed in their own separate substrate, thereby reducing crosstalk.
Although active silicon islands in SOI processes can be completely dielectrically isolated by BOX and DTI, passive R and C couplings may still be present. Using this updated tool, a passive RC network can be extracted for lateral and vertical coupling paths resulting from DTI and BOX. These passive coupling networks can be simulated, in order to assess what impact they will have on the integrated circuit. Key applications for this additional post-layout extraction will be the high-current and high-voltage devices used in industrial and automotive systems.
“Mitigation of substrate coupling is a challenging task, and through support for the extraction of parasitic elements relating to our XT018 BCD-on-SOI process, customers will be able to simulate the coupling of circuit blocks and identify interferences that will be detrimental to performance,” states Lars Bergmann, Director of Design Support at X-Fab “This will be of particular interest in situations where there are very large interference voltages involved or for high frequencies in the single-digit GHz range.”
Other related articles
- X-fab deal creates largest European foundry capacity for integrated photonic circuits
- €1.1bn for a European photonics supply chain
- 180nm BCD-on-SOI process targets 48V battery designs
- Globalfoundries revamps BCD process for automotive chips
Other articles on eeNews Power
- Boom year for X-fab power
- X-Fab moves US fab to SiC, adds epi
- Schneider, Omron targeted by electricity grid malware
- UK’s first micro-punch sinter press boosts power module development
- BorgWarner, Wolfspeed team on 350kW DC fast charger
- 1200V SiC MOSFETs cut on resistance