Xilinx provides first product details for EPP ARM-based devices
The Zynq-7000 family’s programmable logic is based on Xilinx’s 7 series FPGA architecture to ensure 100 percent compatibility with respect to IP, tools and performance across all devices within the 28nm generation.
The smallest Zynq-7000 devices, the Zynq-7010 and Zynq-7020 device, are based on the Artix-7 family which is optimized for lower cost and power. The larger Zynq-7030 device and Zynq-7040 device are based on the Kintex-7 family and includes between four and twelve 10.3 Gbps transceiver channels and a PCI Express Gen2 block for high-speed off-chip connectivity. All four devices also include a new dual 12bit 1Msps analog-to-digital converter block.
The EPP architecture was introduced at the ESC in April 2010 with the promise that pricing and availability will be announced for products based on it in early 2011.
Each Zynq-7000 EPP device is built with an ARM dual-core Cortex-A9 MPCore processing system with NEON and double precision floating point engines that is fully integrated and hardwired, and includes L1 and L2 caches, memory controllers, and commonly used peripherals.
The processing system boots at power-up and can run a variety of operating systems independent of the programmable logic. The processing system then configures the programmable logic on an as needed basis. With this approach, the software programming model is exactly the same as standard, fully featured ARM processor-based SoCs.
Application developers can take advantage of the programmable logic’s parallel processing to handle large amounts of data across a range of signal processing applications, as well as extend the features of the processing system by implementing additional peripherals.
The interconnect between the processing system and the programmable logic is AMBA4 Advanced Extensible Interface (AXI4) which enables multi-gigabit data transfers at very low power, thereby eliminating common performance bottlenecks for control, data, I/O, and memory.
An open design environment that enables parallel development of software for the dual-core Cortex-A9 processor-based system and custom accelerators in the programmable logic. Software developers can use the Eclipse environment, Xilinx Platform Studio Software Development Kit (SDK), ARM Development Studio 5 (DS-5) and ARM RealView Development Suite (RVDS), or compilers, debuggers, and applications from a number of vendors within the ARM Connected Community and Xilinx Alliance Program ecosystems, such as Lauterbach, Wind River, PetaLogix, The MathWorks, Mentor Graphics, Micrium, and MontaVista.
Use of the programmable fabric can be carried out at the same time as software development for the core. This is done using ISE Design Suite, which provides a hardware development environment that includes development tools and AMBA4 AXI4 plug-and-play intellectual property (IP) and bus functional models (BFM) to accelerate design and verification.
Following Xilinx’s acquisition of high level synthesis leader AutoESL Design Technologies, Inc., further tool enhancements are underway to provide C, C++ and SystemC synthesis optimized for the Zynq-7000 device architecture. Future releases will also enable a more seamless movement of key algorithms between the processors and the programmable logic of the Zynq-7000 family.
Third-party vendors within the ARM Connected Community and Xilinx Alliance Program will provide addition solutions in the future as part of Xilinx’s Targeted Design Platform approach to provide an over-arching productive development environment that includes IP, reference designs, development kits, and other resources targeting specific applications and design disciplines.
First silicon devices are scheduled for second half of 2011 with general engineering samples available in the first half of 2012.
Xilinx says pricing varies and depends on volume and choice of device. Based on forward volume production pricing, the Zynq-7000 family will have an entry point of below $15 in high volumes.
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