XMC module links Virtex-6 FPGA to PCIe, SRIO and Gigabit Ethernet interfaces

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The FPGA provides rapid processing and is closely coupled to the serial interconnects to prevent data transfer bottlenecks for simulation, communications, signal intelligence, and image processing applications. Optional front-panel I/O adds dual SFP ports for Fibre Channel or copper Gigabit Ethernet and a VHDCR connector for expanded I/O signal access.
"Combining the powerful Virtex-6 FPGA with these high-speed serial transceivers enables real-time processing of signals in many applications requiring intensive computation tasks and fast interfaces," said Joseph Primeau, Acromag’s embedded sales and marketing director. The FPGA serves as a co-processor applying custom logic and algorithms to streams of remote sensor data. Common uses are processing radar, sonar, or video and communication tasks such as encryption or protocol conversion.
Build options include the choice of a Xilinx XC6LX240T or XC6LX365T FPGA device and additional front-panel I/O connectors. Base models are ready for use in air-cooled or conduction-cooled systems. The front I/O option adds two 2.5Gbps SFP connectors and a 36-pin VHDCR connector for JTAG, USB, and 22 SelectIO. SelectIO signals are Virtex-6 FPGA I/O pins that support single-ended I/O (LVCMOS, HSTL, SSTL) and differential I/O standards (LVDS, HT, LVPECL, BLVDS, HSTL, SSTL). All models are available with extended temperature range parts suitable for -40 to 85 degrees C operation.
The rear I/O supports 8-lane high-speed serial interfaces on both the P15 and P16 XMC ports for PCI Express, Serial RapidIO, 10-Gigabit Ethernet, or Xilinx Aurora implementation. P16 also has 34 SelectIO channels and two global clock pairs direct to the FPGA. The P4 port adds another 60 SelectIO and two more global clock pairs.
Large, high-speed memory banks provide efficient data handling and storage. Generous 128M x 64-bit DDR3 SDRAM buffers store captured data prior to FPGA processing. The data is directly accessible through the FPGA. Afterward, data is moved to the 2M x 72-bit SRAM for high-speed DMA transfer to the bus or CPU. The high-bandwidth serial x4/x8 interface ensures fast data throughput. 16M x 16-bit parallel flash memory conveniently stores MicroBlaze program code.
Acromag’s Engineering Design Kit provides utilities to help users develop custom programs, load VHDL into the FPGA and to establish DMA transfers between the FPGA and the CPU. The kit includes a compiled FPGA file and example VHDL code provided as selectable blocks with examples for the local bus interface, read/writes, and change-of-state interrupts to the PCI bus. A JTAG interface allows users to perform on-board VHDL simulation. Further analysis is supported with a ChipScope Pro interface.
For easy integration of the boards with embedded Windows applications, Acromag developed a DLL driver software package for compatibility with Microsoft Visual C++, and Visual Basic. Sample files with C source demonstration programs provide easy-to-use tools to test operation of the module.
For connectivity with real time application programs, Acromag offers C libraries for VxWorks and other operating systems. The libraries provide generic routines (source code included) to handle reads, writes, interrupts, and other functions. Demonstration programs enable the developer to quickly exercise the I/O modules before attaching the routines to the application program. This diagnostic tool can save hours of troubleshooting and debugging. Free Linux example programs are also available.


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