XMOS announces xCore will be RISC-V compatible
Edge processor and microcontroller vendor XMOS Ltd. (Bristol, England) has said that the fourth generation of its xCore architecture of system-on-chip platform is compatible with the open-source RISC-V architecture.
Without providing details of the compatibility, or what was missing prior, XMOS said the compatibiity would provide RISC-V developers with access to software-defined development of intelligent IoT.
The research phase of the fourth generation of xCore – codenamed Quake – was completed in 2021 and the first physical tape-out of a device is expected in 2023, according to XMOS financial filings.
The collaboration delivers the flexibility to define entire systems in software, enabling RISC-V programmers to rapidly realise the most differentiated and economical solutions to the intelligent IoT.
The xCore SoC platform is based on a software-first approach to SoC design that calls in a combination of event-driven I/O, DSP, AI and standard compute resources to achieve desired functionality. xCore is used with LLVM, TensorFlow, C/C++, FreeRTOS, and third-party models.
“By combining xcore and RISC-V, we open xCore’s potential up to a much larger pool of talent; xCore and RISC-V developers now have common ground for the foundations of the intelligent IoT,” said Henk Muller, CTO of XMOS, in a statement. “Co-opting xCore and RISC-V users into the same ecosystem will accelerate the design of smart devices across a range of industries, from the smart home to the smart factory and beyond.”
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