Murata has launched a range of high capacity silicon capacitors aimed at power distribution networks (PDN) in chip packages for mobile and high-performance computing (HPC) applications.
The SiCap silicon capacitors have a density of 1.3 µF/mm², low ESL of a few pH and low ESR of a few mΩ.
The profile of under 40µm enables chip designers to embed the silicon capacitor into the package as close to the active die as possible, minimizing the current’s effective path length and minimizing the parasitics.
The multi-terminal silicon capacitor devices satisfy the various SoC and microprocessor design requirements for multiple terminal capacitor networks. Replacing conventional monolithic ceramic capacitors with multi-terminal silicon capacitor devices reduces the total quantity of capacitors required on the board significantly, which improves the compactness of the end design. Fewer capacitors also results in total savings in both bill of materials and mounting costs.
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