The graph compiler constructs a data flow graph, and the control flow is implicit in that, says the company. At run time that map of the metaflow is passed to the state machine hardware in the chip which can switch the context and flow based on the incoming data in real time. A scheduler calls in the resources it needs.
“This is a scalable architecture,” says Munagala. “It can be small for the edge camera, larger for an aggregator box to cloud server, so we are building products to multiple application points.”
The compiler works with the popular machine learning frameowrks such as Tensorflow or Caffe, but Blaize has also developed a kernel compiler. “Customers have custom code and we are probably one of three companies on the planet that could compiler the C++ code,” said Munagala. “There are some workloads that don’t exist in a library or are proprietary, and our ability to add a true compiler allows them to develop proprietary code.”
“It’s a modular compiler so its all integrated together. We started on automotive qualification from day one of working on the compiler as well as the hardware and the software components,” he added.
Eighteen months ago the company acquired the UK MIPS design team from Imagination Technologies when the US team was acquired by competitor Wave Computing. It also hired a team in Leeds that had been working on compiler technology for Sega, and together these form the core of the platform engineering tram. The development engineers in Hyderbad are working on the chip and compiler technology.
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