ARM Cortex-R82 targets storage computation

September 03, 2020 // By Nick Flaherty
ARM targets storage computation with Cortex-R82 core
ARM's Cortex-R82 can run a real time operating system, Linux and AI algorithms on solid state drive controllers for storage computation applications

ARM has launched its first 64bit real time processing chip design, adding in an MMU to run Linux.

The Cortex-R82 is twice the performance of the previous 32bit R8 and R5 designs and is aimed squarely at real-time embedded systems, particularly Solid-State Drives (SSDs). These systems have historically required less then 4GB of DRAM and addressable space and have not needed to run Linux. Now, with AI algorithms, there is a need for higher performance, real-time compute with more addressable space and the ability to run Linux, says Neil Werdmuller, senior manager for storage solutions at ARM.

With a footprint of 2mm 2 for four cores in a 5nm process, the Cortex R82 can be used as part of an array of cores, some running a real time operating system or bare metal code direct on the core, and others running Linux, configurable in software.

This compares to one major disk drive developer, Western Digital, design its own 32bit embedded processor cores around the open source RISC-V architecture. However ARM points out that around 85 percent of hard disk drive controllers and solid-state drive controllers use its technology.

The 64bit ARMv8-R instructions with 40 address bits to support 1TByte of memory directly, but it is adding the optional memory management unit that allows the ability to run Linux, accessing the Linux ecosystem that has been ported, optimized and validated on ARM’s Cortex-A cores. It also supports ARM’s Neon technology for accelerating Machine Learning frameworks that are widely used in computational storage applications, for example with the ARM NN library for example which can search for a specific image in a drive full of images.

A Cortex-R82 core can still be configured with a Memory Protection Unit (MPU) to run bare metal and RTOS, but the same core can also be configured with the optional MMU. Both the real-time and MMU context switching can be handled by the same core simultaneously,

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