The new system handles complex ASIC and SoC designs up to 2 billion ASIC gates and gives design and verification engineers unprecedented speed and flexibility for high-speed verification and bug hunting to shorten the time to market by eliminating costly re-spins and by providing early prototypes for software development and to end customers.
Assembled with 4 pluggable proFPGA Stratix 10 GX 10M FPGA modules, the quad system offers a capacity of up to 240 M ASIC gates, which is twice as much compared to the current proFPGA quad VUS 440 system. Up to nine proFPGA quad systems with overall 36 FPGA modules can be easily connected together to increase the capacity up to 2 billion ASIC gates. The system offers 64 extension sites, with a total of 8304 I/Os. This is about 50% more compared to the previous generation. Additionally, the system provides 192 high-speed serial transceivers, which offer maximum flexibility for interconnections and for adapting standard proFPGA daughter boards or application-specific extension boards like DDR4 memory, USB 3.0, SATA, QSFP+, PCIe Gen3 or others. Because of the very compact system architecture and the high-end PCB layout with fully delay-matched signal lines, the proFPGA platform ensures best signal integrity and a maximum system speed of up to 500 MHz in a single FPGA. Over standard I/Os the system achieves a remarkable point-to-point performance of up to 1.4 Gbps and via the high-speed serial transceivers even up to 17.4 Gbps.