Benchmark Stresses Big Chips

February 28, 2015 //By Rick Merritt
Benchmark Stresses Big Chips
The Embedded Microprocessor Benchmark Consortium (EEMBC), a trade group of 47 chip and system designers, released CoreMark-Pro. The suite of benchmarks for 32- and 64-bit processors expands the original CoreMark, a single performance test released in 2009 for microcontrollers and processors.

The CoreMark-Pro suite provides a much richer set of metrics for high-end chips and also provides an extension of the group’s AndEBench, a suite of tests for Android-based systems. The consortium also is working on systems benchmarks for the Internet of Things and networking infrastructure.

CoreMark-Pro consists of five integer and four floating-point tests. The integer workloads include JPEG compression, Zip compression, an XML parser, the SHA-256 security algorithm, and a more memory-intensive version of the original CoreMark. The floating-point workloads include a fast-Fourier transform, a linear algebra routine derived from Linpack, an enhanced version of the Livermore Loops benchmark, and a neural-net algorithm to evaluate patterns.

Users can run the tests individually or have them all combined into a single CoreMark-Pro figure. The summary score is based on math available with the benchmarking software that takes a geometric mean of the different tests and applies normalizing factors “This benchmark is guaranteed to highlight the strengths -- and weaknesses -- of any processor,” said Rajiv Adhikary, a senior software engineer at Analog Devices who chaired of the CoreMark-Pro working group.

The two-year project included participation from a range of EEMBC members including Cavium, Freescale, Imagination Technologies, Intel, Qualcomm, Renesas and Synopsys. The software is available for free, but companies who want to publish results based on the tests need to be EEMBC members or pay a $2,500 fee.


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