The three independent quantum tunnelling channels in the device allow the interconnect between the transistors to be in the active layers, rather than using the metal layers. This also reduces the layer count. The transistor is Normally-On but not saturated, and is controlled by an isolated tunnel connection, rather than a direct metal contact to the base well, as used in traditional bipolar transistors.
Beacuse it uses quantum tunnelling, the architecture relies on a current swing, typically around 300 to 400mA, rather than a voltage swing, for the logic. This leads to lower power consumption and also alternative computational architectures such as analogue computing.
“Because we don’t have a base connection, we connect to the well of the transistor like a FET, although a FET has an isolated gate and we connect to the gate using a tunnel instead,” said David Summerland, CEO of SFN. “It is heavily doped so we don’t have high voltage, and symmetrical so we can push the current through.”
This is the key starting point for the basic transistor, he says. “This means we can do an XOR in 2 transistors, and a flip flop in 8. We can change the tunnelling by area, bias voltage or doping – and we have two orders of magnitude on doping left for scaling,” he added.
There is also a significant advantage in noise immunity. This allows the logic gates to be implemented alongside NPN and PNP power transistors, or even within the structure of the power device.