Cadence integrates functional safety into chip design
ISO 26262 has been in existence for about ten years. As the authoritative standard, it regulates the processes involved in the development of electronic systems in cars and ensures the functional safety of these systems. Until now, this standard was primarily applied at the system level. Because increasingly complex SoCs with heterogeneous multi-core architecture are taking on ever more extensive safety-relevant tasks in automotive electronics, Cadence sees the need to extend these development processes to the chip design level as well. To this end, the company has developed a comprehensive software platform that is not only intended to accelerate development while incorporating security aspects, but also to provide essential support in the complicated ISO 26262 certification process. Similar to ISO 26262 in the automotive sector, the new Cadence Safety Solution also supports Functional Safety in the field of mechanical engineering and automation, where the IEC 61508 standard is applied. The same applies to the corresponding safety standards in aerospace engineering.
The Cadence Safety Solution includes support for both analogue / mixed-signal circuits and digital ICs. It covers the spectrum of so-called FMEDA (Failure Modes Effects and Diagnostic Analysis) functions. This means that it enables users to carry out a comprehensive weak point analysis as well as the targeted injection of errors for test purposes. It enables early investigation of functional security architectures as part of the chip development process and uses native chip design data to efficiently perform accurate security analysis. Machine learning algorithms are also used in this process. In addition, these functions can also be used to optimise chip designs.
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