Cadence streamlines DSP IP for vision, AI applications

May 15, 2019 //By Christoph Hammerschmidt
Cadence streamlines DSP IP for vision, AI applications
AI algorithms such as Deep Learning and Machine Learning are being used in more and more applications - and the demand for computing power of the processors involved is increasing massively, while at the same time the chips must consume less and less power. The EDA software and IP provider Cadence Design Systems now wants to reconcile these conflicting requirements with a new high-end version of its Tensilica signal processor. Cadence's main focus is on image processing applications in vehicles and robotics.

At its latest user conference CDNLive in Munich, Cadence focused on artificial intelligence (AI). “The next wave of semiconductor computing is AI”, said Tom Beckley, Senior Vice President and General Manager of Cadence’s Custom IC & Systems Group, in his keynote speech. While the power footprint of existing AI hardware is still way too high, the market for AI processing system is outgrowing the overall semiconductor market by a factor of 3 over the next ten years, Beckley said, adding that the company will invest “massively” into developing related technologies. The total addressable market for AI processors amounts to $10 to $30 billion, added Cadence Marketing Vice President Craig Cochrane.

In this promising environment, the company recently announced the third generation of its JasperGold Formal Verification platform. Now it is going one better with the introduction of a new version of its Tensilica DSP. The new Vision Q7 version of this popular IP (it bears the release number 6) will be streamlined for Simultaneous Localization and Mapping (SLAM) operations, a type of algorithm that is used in robotics, drones, mobile radio and automotive applications to automatically generate or update a map of an unknown environment. Another SLAM use case is inside out tracking in VR/AR environments.


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