CMOS device fabrication at 500°C for 3D monolithic integration: Page 2 of 2

June 23, 2020 //By Julien Happich
CMOS device
In an FDSOI CMOS processing breakthrough, CEA-Leti scientists have pushed fabrication thermal-process boundaries down to 500°C for CMOS integration, while showing strong performance gains especially in P-type metal-oxide-semiconductor (PMOS) logic devices.

“The maximum temperature regarding bottom device’s silicide integrity and inter-tier interconnections preserved reliability should not exceed 500°C for a couple of hours” the paper reports. “Several low-temperature devices have been published in literature, but up to our knowledge, this is the first proof of integration of CMOS devices processed at a temperature of 500°C, fully compatible with advanced FDSOI platform technologies.”

In addition, the CEA-Leti team demonstrated for the first time ring oscillators and SRAM bitcells processed at 500°C, further paving the way for high-performance 3D monolithic CMOS integration, intended for advanced logic, RF, in-memory computing, AI, imaging and display applications.

CEA-Leti - www.leti-cea.com

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Leti shrinks SRAMs by 30%, proposes new memory designs


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