Codasip targets IoT with 32-bit RISC-V processor

August 21, 2017 //By Julien Happich
Codasip targets IoT with 32-bit RISC-V processor
Embedded CPU cores supplier Codasip announced the newest addition to its Berkelium (Bk) family of RISC-V processors, the Bk-1, an FSM processor targeted at the Internet of Things.

The new processor is aimed at IoT ASIC designers looking to move up from 8-bit processors to 32-bit processors. It is fully compliant with the RISC-V open standard, meaning that embedded software is truly portable and designs are not locked into a proprietary instruction set architecture (ISA).

In its basic configuration, the Bk-1 starts at 9k gates while delivering a maximum clock frequency of up to 350 MHz in a 55nm process. The Bk-1 has an optional power management unit, JTAG debug controller, and bridges to the AMBA buses so it can be easily integrated into existing ARM designs. Codasip provides their customers with high-level design tools that automatically profile the embedded SW and allow ASIC designers to tailor the Bk-1 processor exactly to its intended application. This unique ability to automatically modify the Codasip cores results in far better implementations compared to other processor IP vendors, and allows for the process to be easily completed in a day or two with the silicon proven Codasip Studio tool suite, claims the company.

Pricing of the Bk-1 processor starts at $40K, making it competitive to the processors available in the ARM DesignStart program. The advantage is that the Codasip Bk-1 license agreement has no royalties, saving IoT ASIC designers at least $300–400K in additional costs compared with ARM, Andes, and Cortus cores, according to Codasip. IoT ASIC designers can request an evaluation kit free of charge.

Codasip – www.codasip.com


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