Codasip's Studio: 7th edition for the easy configuration of RISC-V processors

January 23, 2018 //By Julien Happich
Codasip's Studio: 7th edition for the easy configuration of RISC-V processors
RISC-V embedded processor IP supplier Codasip has launched the 7th generation of its Studio, IP-design and customization software that allows for fast configuration and optimization of RISC-V processors and customer-proprietary processor architectures.

Studio 7 can be used for processor prototyping for a specific application domain, fast design space exploration, or the development of custom extensions using Codasip’s architecture description CodAL language.

The tool then generates hardware and corresponding SDKs that are aware of the custom extensions, including Verilog or VHDL RTL and System Verilog UVM environments, testbenches and synthesis scripts, full compiler toolchain including advanced profiling and debugging tools, and both cycle-accurate and fast instruction-accurate simulation tools.

Some of the new features included with Studio 7 include native support for industry-standard AMBA interfaces, allowing for easy replacement of other processor cores while reusing existing, proven peripheral IP. IEEE 1149-7-compatible 2-wire JTAG minimizes pin-count. The tool also features improved clock-gating for low-power requirements. Major updates to Codespace, the optional Eclipse-based IDE, and the underlying software tools include support for LLVM 5.0.

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