Codeplay joins Japanese on HPC, AI standard for RISC-V

November 02, 2020 // By Peter Clarke
Codeplay joins Japanese on HPC, AI standard for RISC-V
Codeplay Software has joined with Kyoto Microcomputer and Nsitexe to implement OpenCL and Sycl for RISC-V processor cores. The company has also joined the RISC-V Foundation.

OpenCL and Sycl are standards from the Khronos Group consortium and implementing them for RISC-V processors will make it easier to port existing high performance computing and artificial intelligence software for embedded systems, Codeplay said.

The project is funded by Japan’s New Energy and Industrial Technology Development Organisation (NEDO). Nsitexe and Kyoto Microcomputer have ordered an implementation of LLVM for RISC-V Vector Extension Processor (RVV), and also Codeplay’s ComputeAorta and ComputeCpp, implementations of OpenCL and SYCL open standards.

The development is expected to ease the development of AI chips for such applications as self-driving vehicles to the study and prediction of climate change.

"The growth in adopting the SYCL standard for programming AI systems, and the strong interest in RISC-V open processors in all market segments makes this project extremely important to all involved," said Andrew Richards, founder and CEO of Codeplay, in a statement.

"Sycl is a modern C++ programming language that allows software developers to take advantage of the latest industry agreed standards and benefit from the growing ecosystem," said Michael Wong, distinguished engineer with Codeplay ad chair of the Sycl working group within Khronos.

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