Specifically, this technology will support the production of evidence of the timing behaviour of software running on multicore systems. MASTECS’s focus will primarily be on the avionics and automotive sectors, where the use of multicore processors is required to support increasingly complex software-controlled functionalities.
The MASTECS approach builds on the Barcelona Supercomputing Center’s (BSC) Multicore microbenchmark technology (MµBT) and the Rapita Verification Suite (RVS), developed by Rapita Systems. These technologies have already been integrated into a TRL6 Multicore Timing Solution (MTS), which is currently being deployed in several commercial pilot studies with aerospace and automotive tier 1 suppliers.
MASTECS aims to increase the TRL of the MTS from TRL6 to TRL8 by improving automation, certification, and qualification aspects. Case studies in the automotive (Marelli Europe) and avionics (United Technologies Research Centre Ireland - UTRC Ireland) domains will provide evidence on the industrial applicability and on the effectiveness of the developed MTS technology.