Specifically, it aims to develop an exploratory supercomputing infrastructure for the development, integration, testing and co-design of a wide range of European technologies which could form part of future European exascale systems, based on European-developed intellectual property (IP). The ultimate goal is to create an open full-stack (software and hardware) ecosystem that could form the foundation for many other European systems, both in high-performance computing (HPC) and embedded computing, with benefits for numerous stakeholders within academia and industry.
“The MareNostrum Experimental Exascale Platform (MEEP), as a performance evaluation and software development vehicle for future chip designs, will provide European technology that will set a foundation for many systems, both in HPC and beyond,” says John Davis, MEEP coordinator at BSC.
“By championing the open-source RISC-V instruction set architecture, MEEP will help ensure European technological sovereignty by avoiding the export restrictions associated with proprietary models, while building the software ecosystem necessary to make RISC-V viable for a wider range of applications.”
Using an innovative emulation platform based on field-programmable gate arrays (FPGAs), MEEP will provide a test-bed for RISC-V-based infrastructure, as well as building the initial software ecosystem to support this. MEEP’s software development will translate into a proof-of-concept for industrial usage, enabling next-generation exploration of computer architecture as well as software development of existing and future HPC applications, including emerging artificial intelligence workloads, across sectors from pharmaceutical to automotive.