Extreme transistor scaling with 2D materials

December 09, 2019 //By Julien Happich
2D materials
At this year’s IEEE International Electron Devices Meeting, researchers from imec have presented an in-depth study of scaled transistors using MoS2 as a 2D channel, with device performances outperforming previous 2D-based FETs.

As a 2D material, MoS2 can be grown in stable form with nearly atomic thickness and atomic precision. The researchers synthesized the material down to a monolayer, only 0.6nm thick and then fabricated devices with scaled contact and channel length, as small as 13nm and 30nm respectively.

Using these very scaled dimensions, combined with scaled gate oxide thickness and high K dielectric, the researchers were able to achieve some of the best device performances so far. Most importantly, these transistors enable a comprehensive study of fundamental device properties and calibration of TCAD models. The calibrated TCAD model is used to propose a realistic path for performance improvement.


Transfer characteristics have improved sub-threshold swing
(SS) with thinner HfO2.

Theoretical studies recommend 2D materials as the perfect channel material for extreme transistor scaling as only little short channel effects are expected compared to the current Si-based devices. Hints of this potential have already been published with one-of-a-kind transistors built on natural flakes of 2D materials.
For the first time, imec has tested these theoretical findings through a comprehensive set of 2D-materials-based transistor data. The devices with the smallest footprint have a channel length of 30nm
with a contact pitch under 50nm.

ON current as high as 250µA/µm has been demonstrated with a 50nm SiO2 gate dielectric. Here, an ON current of about 100 µA/µm and an excellent SSmin of 80mV/dec (for VD =50mV) have been demonstrated with 4nm HfO2 in a back-gated configuration.


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