FPGA development suite for Talon RF/IF signal recorders

May 11, 2020 //By Julien Happich
FPGA development
The ArchiTek FPGA development suite announced by Pentek enables engineers to add FPGA IP to recording systems, such as threshold detection, spectral filtering, digital down-conversion, signal classification, demodulation and many other digital signal processing techniques.

Developing custom IP for an FPGA requires an architecture that protects the user from custom IP development pitfalls such as breaking the existing IP and corresponding recording software. ArchiTek harnesses Pentek's Navigator FPGA Development Kit (FDK) and Board Support Package (BSP) to provide a development environment that steps engineers through the process of integrating custom IP into the recorder. Along with the Navigator FDK, ArchiTek provides the foundation and example projects for adding IP to user blocks and creating additional data-path branches from existing data streams. The structured design protects the recorder’s standard functionality, reducing development time and risk.
Customers can now add FPGA IP to a recorder for real-time, on-the-fly digital signal processing during the data acquisition process, greatly reducing the time associated with post-processing recorded data. Recording of only critical data also greatly reduces transfer rates, recording capacity requirements, and data offload time.
Using ArchiTek, FPGA developers can add additional recording channels to the system, so users can record both processed and unprocessed data simultaneously. ArchiTek provides extensive documentation and tutorials to assist developers through the customization process, reducing both risk and development time. The ArchiTek FPGA Development Suite, Model 4818, is currently available for select models of Talon recorders.

Pentek – www.pentek.com


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