The software is free and increases the DFT capabilities of the schematic capture and PCB design system.
With the increasing use of dense packing of array pinned packages on PCBs physical contact at nodes and pins for test equipment is becoming practically impossible. It therefore becomes more important to include boundary scan chains at the design stage. XJTAG DFT Assistant for Altium Designer helps validate correct boundary scan chain connectivity, through full integration with Altium Designer.
"While the first prototype is being manufactured, XJTAG DFT Assistant allows you to export a preliminary XJTAG project from Altium Designer to the XJTAG development software, where additional tests can be developed," said Simon Payne, CEO of XJTAG, in a statement.
The XJTAG DFT Assistant for Altium Designer comprises two key elements; the XJTAG Chain Checker, and the XJTAG Access Viewer.
XJTAG Chain Checker identifies common errors in a JTAG scan chain, such as incorrectly connected Test Access Ports (TAPs). A single connection error would inhibit an entire scan chain from working, XJTAG Chain Checker identifies connection errors and reports them to the developer during the design process. Incorrectly terminated TAPs are also identified.
XJTAG Access Viewer overlays the extent of boundary scan access onto the schematic diagram, allowing users to instantly see which components are accessible using boundary scan, and where test coverage could be further extended.
The boundary scan method is defined by the IEEE 1149.x family of standards and requires a 4- or 5-signal bus that sequentially connects JTAG-enabled devices. XJTAG DFT Assistant for Altium Designer is a free extension downloadable from the Extensions panel.
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