Low-power FPGA accelerates embedded vision

July 15, 2019 // By Julien Happich
embedded vision
With its Smart Embedded Vision initiative, Microchip aims to provide solutions for designing intelligent machine vision systems based on low-power PolarFire FPGAs.

The company now extends its high-resolution smart embedded vision FPGA offerings with enhanced high-speed imaging interfaces, an intellectual property (IP) bundle for image processing and an expanded partner ecosystem. To further address design requirements for intelligent vision systems, Microchip has added a Serial Digital Interface (SDI) IP to transport uncompressed video data streams over coaxial cabling. The interface comes in multiple speeds: HD-SDI (1.485 Gbps, 720p, 1080i), 3G-SDI (2.970 Gbps, 1080p60), 6G-SDI (5.94 Gbps, 2Kp30) and 12G-SDI (11.88 Gbps, 2Kp60).

Typically used in industrial cameras, MIPI-CSI-2 is a sensor interface that links image sensors to FPGAs. The PolarFire family now supports receive speeds up to 1.5 Gbps per lane and transmit speeds up to 1 Gbps per lane.

Customers can also implement a two-lane or eight-lane SLVS-EC Rx FPGA core to support high-resolution cameras at 2.3 Gbps per lane. The PolarFire family can support 1, 2.5, 5 and 10 Gbps speeds over an Ethernet PHY, enabling the initiative to meet the need for Universal Serial 10 GE Media Independent Interface (USXGMII) MAC IP with auto-negotiation.

Further IP such as the 6.25 Gbps CoaXPress v1.1 Host and Device IP can be used in high- performance machine vision, medical and in industrial inspection. Aligned with the industry’s roadmap for the standard, Microchip will support CoaXPress v2.0, which doubles the bandwidth to 12.5 Gbps.

The HDMI 2.0b IP core offered today supports resolutions up to 4K at 60 fps transmit and 1080p at 60 fps receive. The PolarFire FPGA Imaging IP bundle features the MIPI-CSI-2 and includes image processing IPs for edge detection, alpha blending and image enhancement for colour, brightness and contrast adjustments.

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